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spirv: Fixes and Intel specific workarounds

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This commit is contained in:
ReinUsesLisp
2021-02-21 23:42:38 -03:00
committed by ameerj
parent 704c6f353f
commit 274897dfd5
11 changed files with 44 additions and 32 deletions
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3
src/shader_recompiler/frontend/maxwell/program.cpp
View File

@ -56,7 +56,6 @@ IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Blo
.post_order_blocks{},
});
}
fmt::print(stdout, "{}\n", IR::DumpProgram(program));
Optimization::LowerFp16ToFp32(program);
for (IR::Function& function : functions) {
function.post_order_blocks = PostOrder(function.blocks);
@ -70,8 +69,6 @@ IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Blo
Optimization::VerificationPass(function);
}
Optimization::CollectShaderInfoPass(program);
fmt::print(stdout, "{}\n", IR::DumpProgram(program));
return program;
}

15
src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp
View File

@ -83,9 +83,12 @@ IR::U32 TranslatorVisitor::GetImm20(u64 insn) {
BitField<20, 19, u64> value;
BitField<56, 1, u64> is_negative;
} const imm{insn};
const s32 positive_value{static_cast<s32>(imm.value)};
const s32 value{imm.is_negative != 0 ? -positive_value : positive_value};
return ir.Imm32(value);
if (imm.is_negative != 0) {
const s64 raw{static_cast<s64>(imm.value)};
return ir.Imm32(static_cast<s32>(-(1LL << 19) + raw));
} else {
return ir.Imm32(static_cast<u32>(imm.value));
}
}
IR::F32 TranslatorVisitor::GetFloatImm20(u64 insn) {
@ -94,9 +97,9 @@ IR::F32 TranslatorVisitor::GetFloatImm20(u64 insn) {
BitField<20, 19, u64> value;
BitField<56, 1, u64> is_negative;
} const imm{insn};
const f32 positive_value{Common::BitCast<f32>(static_cast<u32>(imm.value) << 12)};
const f32 value{imm.is_negative != 0 ? -positive_value : positive_value};
return ir.Imm32(value);
const u32 sign_bit{imm.is_negative != 0 ? (1ULL << 31) : 0};
const u32 value{static_cast<u32>(imm.value) << 12};
return ir.Imm32(Common::BitCast<f32>(value | sign_bit));
}
IR::U32 TranslatorVisitor::GetImm32(u64 insn) {