Shader_IR: allow lookup of texture samplers within the shader_ir for instructions that don't provide it

src/video_core/engines/const_buffer_engine_interface.h

@@ -4,7 +4,10 @@
 
 #pragma once
 
+#include "common/bit_field.h"
 #include "common/common_types.h"
+#include "video_core/engines/shader_bytecode.h"
+#include "video_core/textures/texture.h"
 
 namespace Tegra::Engines {
 
@@ -17,10 +20,100 @@ enum class ShaderType : u32 {
     Compute = 5,
 };
 
+struct SamplerDescriptor {
+    union {
+        BitField<0, 20, Tegra::Shader::TextureType> texture_type;
+        BitField<20, 1, u32> is_array;
+        BitField<21, 1, u32> is_buffer;
+        BitField<22, 1, u32> is_shadow;
+        u32 raw{};
+    };
+
+    static SamplerDescriptor FromTicTexture(Tegra::Texture::TextureType tic_texture_type) {
+        SamplerDescriptor result{};
+        switch (tic_texture_type) {
+        case Tegra::Texture::TextureType::Texture1D: {
+            result.texture_type.Assign(Tegra::Shader::TextureType::Texture1D);
+            result.is_array.Assign(0);
+            result.is_buffer.Assign(0);
+            result.is_shadow.Assign(0);
+            return result;
+        }
+        case Tegra::Texture::TextureType::Texture2D: {
+            result.texture_type.Assign(Tegra::Shader::TextureType::Texture2D);
+            result.is_array.Assign(0);
+            result.is_buffer.Assign(0);
+            result.is_shadow.Assign(0);
+            return result;
+        }
+        case Tegra::Texture::TextureType::Texture3D: {
+            result.texture_type.Assign(Tegra::Shader::TextureType::Texture3D);
+            result.is_array.Assign(0);
+            result.is_buffer.Assign(0);
+            result.is_shadow.Assign(0);
+            return result;
+        }
+        case Tegra::Texture::TextureType::TextureCubemap: {
+            result.texture_type.Assign(Tegra::Shader::TextureType::TextureCube);
+            result.is_array.Assign(0);
+            result.is_buffer.Assign(0);
+            result.is_shadow.Assign(0);
+            return result;
+        }
+        case Tegra::Texture::TextureType::Texture1DArray: {
+            result.texture_type.Assign(Tegra::Shader::TextureType::Texture1D);
+            result.is_array.Assign(1);
+            result.is_buffer.Assign(0);
+            result.is_shadow.Assign(0);
+            return result;
+        }
+        case Tegra::Texture::TextureType::Texture2DArray: {
+            result.texture_type.Assign(Tegra::Shader::TextureType::Texture2D);
+            result.is_array.Assign(1);
+            result.is_buffer.Assign(0);
+            result.is_shadow.Assign(0);
+            return result;
+        }
+        case Tegra::Texture::TextureType::Texture1DBuffer: {
+            result.texture_type.Assign(Tegra::Shader::TextureType::Texture1D);
+            result.is_array.Assign(0);
+            result.is_buffer.Assign(1);
+            result.is_shadow.Assign(0);
+            return result;
+        }
+        case Tegra::Texture::TextureType::Texture2DNoMipmap: {
+            result.texture_type.Assign(Tegra::Shader::TextureType::Texture2D);
+            result.is_array.Assign(0);
+            result.is_buffer.Assign(0);
+            result.is_shadow.Assign(0);
+            return result;
+        }
+        case Tegra::Texture::TextureType::TextureCubeArray: {
+            result.texture_type.Assign(Tegra::Shader::TextureType::TextureCube);
+            result.is_array.Assign(1);
+            result.is_buffer.Assign(0);
+            result.is_shadow.Assign(0);
+            return result;
+        }
+        default: {
+            result.texture_type.Assign(Tegra::Shader::TextureType::Texture2D);
+            result.is_array.Assign(0);
+            result.is_buffer.Assign(0);
+            result.is_shadow.Assign(0);
+            return result;
+        }
+        }
+    }
+};
+
 class ConstBufferEngineInterface {
 public:
     virtual ~ConstBufferEngineInterface() {}
     virtual u32 AccessConstBuffer32(ShaderType stage, u64 const_buffer, u64 offset) const = 0;
+    virtual SamplerDescriptor AccessBoundSampler(ShaderType stage, u64 offset) const = 0;
+    virtual SamplerDescriptor AccessBindlessSampler(ShaderType stage, u64 const_buffer,
+                                                    u64 offset) const = 0;
+    virtual u32 GetBoundBuffer() const = 0;
 };
 
-}
+} // namespace Tegra::Engines

src/video_core/engines/kepler_compute.cpp

@@ -78,6 +78,24 @@ u32 KeplerCompute::AccessConstBuffer32(ShaderType stage, u64 const_buffer, u64 o
     return result;
 }
 
+SamplerDescriptor KeplerCompute::AccessBoundSampler(ShaderType stage, u64 offset) const {
+    return AccessBindlessSampler(stage, regs.tex_cb_index, offset * sizeof(Texture::TextureHandle));
+}
+
+SamplerDescriptor KeplerCompute::AccessBindlessSampler(ShaderType stage, u64 const_buffer,
+                                                       u64 offset) const {
+    ASSERT(stage == ShaderType::Compute);
+    const auto& tex_info_buffer = launch_description.const_buffer_config[const_buffer];
+    const GPUVAddr tex_info_address =
+        tex_info_buffer.Address() + offset;
+
+    const Texture::TextureHandle tex_handle{memory_manager.Read<u32>(tex_info_address)};
+    const Texture::FullTextureInfo tex_info = GetTextureInfo(tex_handle, offset);
+    SamplerDescriptor result = SamplerDescriptor::FromTicTexture(tex_info.tic.texture_type.Value());
+    result.is_shadow.Assign(tex_info.tsc.depth_compare_enabled.Value());
+    return result;
+}
+
 void KeplerCompute::ProcessLaunch() {
     const GPUVAddr launch_desc_loc = regs.launch_desc_loc.Address();
     memory_manager.ReadBlockUnsafe(launch_desc_loc, &launch_description,

src/video_core/engines/kepler_compute.h

@@ -10,8 +10,8 @@
 #include "common/bit_field.h"
 #include "common/common_funcs.h"
 #include "common/common_types.h"
-#include "video_core/engines/engine_upload.h"
 #include "video_core/engines/const_buffer_engine_interface.h"
+#include "video_core/engines/engine_upload.h"
 #include "video_core/gpu.h"
 #include "video_core/textures/texture.h"
 
@@ -38,7 +38,7 @@ namespace Tegra::Engines {
 #define KEPLER_COMPUTE_REG_INDEX(field_name)                                                       \
     (offsetof(Tegra::Engines::KeplerCompute::Regs, field_name) / sizeof(u32))
 
-class KeplerCompute final : public ConstBufferEngineInterface  {
+class KeplerCompute final : public ConstBufferEngineInterface {
 public:
     explicit KeplerCompute(Core::System& system, VideoCore::RasterizerInterface& rasterizer,
                            MemoryManager& memory_manager);
@@ -204,6 +204,15 @@ public:
 
     u32 AccessConstBuffer32(ShaderType stage, u64 const_buffer, u64 offset) const override;
 
+    SamplerDescriptor AccessBoundSampler(ShaderType stage, u64 offset) const override;
+
+    SamplerDescriptor AccessBindlessSampler(ShaderType stage, u64 const_buffer,
+                                            u64 offset) const override;
+
+    u32 GetBoundBuffer() const override {
+        return regs.tex_cb_index;
+    }
+
 private:
     Core::System& system;
     VideoCore::RasterizerInterface& rasterizer;

src/video_core/engines/maxwell_3d.cpp

@@ -856,4 +856,22 @@ u32 Maxwell3D::AccessConstBuffer32(ShaderType stage, u64 const_buffer, u64 offse
     return result;
 }
 
+SamplerDescriptor Maxwell3D::AccessBoundSampler(ShaderType stage, u64 offset) const {
+    return AccessBindlessSampler(stage, regs.tex_cb_index, offset * sizeof(Texture::TextureHandle));
+}
+
+SamplerDescriptor Maxwell3D::AccessBindlessSampler(ShaderType stage, u64 const_buffer,
+                                                   u64 offset) const {
+    ASSERT(stage != ShaderType::Compute);
+    const auto& shader = state.shader_stages[static_cast<std::size_t>(stage)];
+    const auto& tex_info_buffer = shader.const_buffers[const_buffer];
+    const GPUVAddr tex_info_address = tex_info_buffer.address + offset;
+
+    const Texture::TextureHandle tex_handle{memory_manager.Read<u32>(tex_info_address)};
+    const Texture::FullTextureInfo tex_info = GetTextureInfo(tex_handle, offset);
+    SamplerDescriptor result = SamplerDescriptor::FromTicTexture(tex_info.tic.texture_type.Value());
+    result.is_shadow.Assign(tex_info.tsc.depth_compare_enabled.Value());
+    return result;
+}
+
 } // namespace Tegra::Engines

src/video_core/engines/maxwell_3d.h

@@ -15,8 +15,8 @@
 #include "common/common_funcs.h"
 #include "common/common_types.h"
 #include "common/math_util.h"
-#include "video_core/engines/const_buffer_info.h"
 #include "video_core/engines/const_buffer_engine_interface.h"
+#include "video_core/engines/const_buffer_info.h"
 #include "video_core/engines/engine_upload.h"
 #include "video_core/gpu.h"
 #include "video_core/macro_interpreter.h"
@@ -1260,6 +1260,15 @@ public:
 
     u32 AccessConstBuffer32(ShaderType stage, u64 const_buffer, u64 offset) const override;
 
+    SamplerDescriptor AccessBoundSampler(ShaderType stage, u64 offset) const override;
+
+    SamplerDescriptor AccessBindlessSampler(ShaderType stage, u64 const_buffer,
+                                            u64 offset) const override;
+
+    u32 GetBoundBuffer() const override {
+        return regs.tex_cb_index;
+    }
+
     /// Memory for macro code - it's undetermined how big this is, however 1MB is much larger than
     /// we've seen used.
     using MacroMemory = std::array<u32, 0x40000>;