mirror of
https://github.com/yuzu-emu/yuzu-android.git
synced 2025-06-15 21:38:32 -05:00
shader_ir: Rename BasicBlock to NodeBlock
It's not always used as a basic block. Rename it for consistency.
This commit is contained in:
@ -13,7 +13,7 @@ using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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using Tegra::Shader::SubOp;
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u32 ShaderIR::DecodeArithmetic(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodeArithmetic(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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@ -12,7 +12,7 @@ namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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u32 ShaderIR::DecodeArithmeticHalf(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodeArithmeticHalf(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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@ -12,7 +12,7 @@ namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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u32 ShaderIR::DecodeArithmeticHalfImmediate(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodeArithmeticHalfImmediate(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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@ -12,7 +12,7 @@ namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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u32 ShaderIR::DecodeArithmeticImmediate(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodeArithmeticImmediate(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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@ -15,7 +15,7 @@ using Tegra::Shader::OpCode;
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using Tegra::Shader::Pred;
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using Tegra::Shader::Register;
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u32 ShaderIR::DecodeArithmeticInteger(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodeArithmeticInteger(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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@ -242,7 +242,7 @@ u32 ShaderIR::DecodeArithmeticInteger(BasicBlock& bb, u32 pc) {
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return pc;
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}
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void ShaderIR::WriteLop3Instruction(BasicBlock& bb, Register dest, Node op_a, Node op_b, Node op_c,
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void ShaderIR::WriteLop3Instruction(NodeBlock& bb, Register dest, Node op_a, Node op_b, Node op_c,
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Node imm_lut, bool sets_cc) {
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constexpr u32 lop_iterations = 32;
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const Node one = Immediate(1);
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@ -16,7 +16,7 @@ using Tegra::Shader::Pred;
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using Tegra::Shader::PredicateResultMode;
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using Tegra::Shader::Register;
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u32 ShaderIR::DecodeArithmeticIntegerImmediate(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodeArithmeticIntegerImmediate(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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@ -54,9 +54,9 @@ u32 ShaderIR::DecodeArithmeticIntegerImmediate(BasicBlock& bb, u32 pc) {
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return pc;
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}
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void ShaderIR::WriteLogicOperation(BasicBlock& bb, Register dest, LogicOperation logic_op,
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Node op_a, Node op_b, PredicateResultMode predicate_mode,
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Pred predicate, bool sets_cc) {
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void ShaderIR::WriteLogicOperation(NodeBlock& bb, Register dest, LogicOperation logic_op, Node op_a,
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Node op_b, PredicateResultMode predicate_mode, Pred predicate,
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bool sets_cc) {
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const Node result = [&]() {
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switch (logic_op) {
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case LogicOperation::And:
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@ -12,7 +12,7 @@ namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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u32 ShaderIR::DecodeBfe(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodeBfe(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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@ -12,7 +12,7 @@ namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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u32 ShaderIR::DecodeBfi(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodeBfi(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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@ -13,7 +13,7 @@ using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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using Tegra::Shader::Register;
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u32 ShaderIR::DecodeConversion(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodeConversion(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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@ -12,7 +12,7 @@ namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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u32 ShaderIR::DecodeFfma(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodeFfma(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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@ -12,7 +12,7 @@ namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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u32 ShaderIR::DecodeFloatSet(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodeFloatSet(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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@ -13,7 +13,7 @@ using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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using Tegra::Shader::Pred;
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u32 ShaderIR::DecodeFloatSetPredicate(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodeFloatSetPredicate(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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@ -14,7 +14,7 @@ namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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u32 ShaderIR::DecodeHalfSet(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodeHalfSet(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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@ -13,7 +13,7 @@ using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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using Tegra::Shader::Pred;
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u32 ShaderIR::DecodeHalfSetPredicate(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodeHalfSetPredicate(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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@ -16,7 +16,7 @@ using Tegra::Shader::HalfType;
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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u32 ShaderIR::DecodeHfma2(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodeHfma2(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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@ -12,7 +12,7 @@ namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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u32 ShaderIR::DecodeIntegerSet(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodeIntegerSet(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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@ -13,7 +13,7 @@ using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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using Tegra::Shader::Pred;
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u32 ShaderIR::DecodeIntegerSetPredicate(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodeIntegerSetPredicate(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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@ -36,7 +36,7 @@ static std::size_t GetCoordCount(TextureType texture_type) {
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}
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}
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u32 ShaderIR::DecodeMemory(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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@ -431,8 +431,7 @@ const Sampler& ShaderIR::GetSampler(const Tegra::Shader::Sampler& sampler, Textu
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return *used_samplers.emplace(entry).first;
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}
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void ShaderIR::WriteTexInstructionFloat(BasicBlock& bb, Instruction instr,
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const Node4& components) {
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void ShaderIR::WriteTexInstructionFloat(NodeBlock& bb, Instruction instr, const Node4& components) {
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u32 dest_elem = 0;
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for (u32 elem = 0; elem < 4; ++elem) {
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if (!instr.tex.IsComponentEnabled(elem)) {
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@ -447,7 +446,7 @@ void ShaderIR::WriteTexInstructionFloat(BasicBlock& bb, Instruction instr,
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}
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}
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void ShaderIR::WriteTexsInstructionFloat(BasicBlock& bb, Instruction instr,
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void ShaderIR::WriteTexsInstructionFloat(NodeBlock& bb, Instruction instr,
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const Node4& components) {
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// TEXS has two destination registers and a swizzle. The first two elements in the swizzle
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// go into gpr0+0 and gpr0+1, and the rest goes into gpr28+0 and gpr28+1
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@ -471,7 +470,7 @@ void ShaderIR::WriteTexsInstructionFloat(BasicBlock& bb, Instruction instr,
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}
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}
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void ShaderIR::WriteTexsInstructionHalfFloat(BasicBlock& bb, Instruction instr,
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void ShaderIR::WriteTexsInstructionHalfFloat(NodeBlock& bb, Instruction instr,
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const Node4& components) {
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// TEXS.F16 destionation registers are packed in two registers in pairs (just like any half
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// float instruction).
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@ -14,7 +14,7 @@ using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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using Tegra::Shader::Register;
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u32 ShaderIR::DecodeOther(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodeOther(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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@ -13,7 +13,7 @@ using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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using Tegra::Shader::Pred;
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u32 ShaderIR::DecodePredicateSetPredicate(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodePredicateSetPredicate(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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@ -12,7 +12,7 @@ namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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u32 ShaderIR::DecodePredicateSetRegister(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodePredicateSetRegister(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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@ -12,7 +12,7 @@ namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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u32 ShaderIR::DecodeRegisterSetPredicate(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodeRegisterSetPredicate(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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@ -12,7 +12,7 @@ namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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u32 ShaderIR::DecodeShift(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodeShift(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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@ -15,7 +15,7 @@ using Tegra::Shader::Pred;
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using Tegra::Shader::VideoType;
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using Tegra::Shader::VmadShr;
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u32 ShaderIR::DecodeVideo(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodeVideo(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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@ -12,7 +12,7 @@ namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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u32 ShaderIR::DecodeXmad(BasicBlock& bb, u32 pc) {
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u32 ShaderIR::DecodeXmad(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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