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Implement SetLcdForceBlack, move register enum to hw.h

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This commit is contained in:
archshift
2015-03-05 19:38:23 -08:00
parent 8e4e28aacb
commit 47010fea31
4 changed files with 69 additions and 36 deletions
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9
src/core/hw/gpu.cpp
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@ -15,12 +15,13 @@
#include "core/hle/service/gsp_gpu.h"
#include "core/hle/service/dsp_dsp.h"
#include "core/hw/hw.h"
#include "core/hw/gpu.h"
#include "video_core/command_processor.h"
#include "video_core/utils.h"
#include "video_core/video_core.h"
#include <video_core/color.h>
#include "video_core/color.h"
namespace GPU {
@ -40,7 +41,7 @@ static bool last_skip_frame = false;
template <typename T>
inline void Read(T &var, const u32 raw_addr) {
u32 addr = raw_addr - 0x1EF00000;
u32 addr = raw_addr - HW::VADDR_GPU;
u32 index = addr / 4;
// Reads other than u32 are untested, so I'd rather have them abort than silently fail
@ -54,7 +55,7 @@ inline void Read(T &var, const u32 raw_addr) {
template <typename T>
inline void Write(u32 addr, const T data) {
addr -= 0x1EF00000;
addr -= HW::VADDR_GPU;
u32 index = addr / 4;
// Writes other than u32 are untested, so I'd rather have them abort than silently fail
@ -313,8 +314,6 @@ void Init() {
framebuffer_top.address_right2 = 0x182B9800;
framebuffer_sub.address_left1 = 0x1848F000;
framebuffer_sub.address_left2 = 0x184C7800;
//framebuffer_sub.address_right1 = unknown;
//framebuffer_sub.address_right2 = unknown;
framebuffer_top.width = 240;
framebuffer_top.height = 400;

26
src/core/hw/hw.cpp
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@ -9,32 +9,6 @@
namespace HW {
enum {
VADDR_HASH = 0x1EC01000,
VADDR_CSND = 0x1EC03000,
VADDR_DSP = 0x1EC40000,
VADDR_PDN = 0x1EC41000,
VADDR_CODEC = 0x1EC41000,
VADDR_SPI = 0x1EC42000,
VADDR_SPI_2 = 0x1EC43000, // Only used under TWL_FIRM?
VADDR_I2C = 0x1EC44000,
VADDR_CODEC_2 = 0x1EC45000,
VADDR_HID = 0x1EC46000,
VADDR_PAD = 0x1EC46000,
VADDR_PTM = 0x1EC46000,
VADDR_GPIO = 0x1EC47000,
VADDR_I2C_2 = 0x1EC48000,
VADDR_SPI_3 = 0x1EC60000,
VADDR_I2C_3 = 0x1EC61000,
VADDR_MIC = 0x1EC62000,
VADDR_PXI = 0x1EC63000, // 0xFFFD2000
//VADDR_NTRCARD
VADDR_CDMA = 0xFFFDA000, // CoreLink DMA-330? Info
VADDR_DSP_2 = 0x1ED03000,
VADDR_HASH_2 = 0x1EE01000,
VADDR_GPU = 0x1EF00000,
};
template <typename T>
inline void Read(T &var, const u32 addr) {
switch (addr & 0xFFFFF000) {

26
src/core/hw/hw.h
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@ -8,6 +8,32 @@
namespace HW {
enum {
VADDR_IO = 0x1EC00000,
VADDR_HASH = 0x1EC01000,
VADDR_CSND = 0x1EC03000,
VADDR_DSP = 0x1EC40000,
VADDR_PDN = 0x1EC41000,
VADDR_CODEC = 0x1EC41000,
VADDR_SPI = 0x1EC42000,
VADDR_SPI_2 = 0x1EC43000, // Only used under TWL_FIRM?
VADDR_I2C = 0x1EC44000,
VADDR_CODEC_2 = 0x1EC45000,
VADDR_HID = 0x1EC46000,
VADDR_GPIO = 0x1EC47000,
VADDR_I2C_2 = 0x1EC48000,
VADDR_SPI_3 = 0x1EC60000,
VADDR_I2C_3 = 0x1EC61000,
VADDR_MIC = 0x1EC62000,
VADDR_PXI = 0x1EC63000, // 0xFFFD2000
//VADDR_NTRCARD
VADDR_CDMA = 0xFFFDA000, // CoreLink DMA-330? Info
VADDR_LCD = 0x1ED02000,
VADDR_DSP_2 = 0x1ED03000,
VADDR_HASH_2 = 0x1EE01000,
VADDR_GPU = 0x1EF00000,
};
template <typename T>
void Read(T &var, const u32 addr);