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Disassembler: ARMv6K hint instructions

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This commit is contained in:
aroulin
2015-08-05 12:12:24 +02:00
parent b6c241d667
commit 5d81a2fd48
2 changed files with 56 additions and 0 deletions
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7
src/core/arm/disassembler/arm_disasm.h
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@ -41,11 +41,13 @@ enum Opcode {
OP_MSR,
OP_MUL,
OP_MVN,
OP_NOP,
OP_ORR,
OP_PLD,
OP_RSB,
OP_RSC,
OP_SBC,
OP_SEV,
OP_SMLAL,
OP_SMULL,
OP_STC,
@ -63,6 +65,9 @@ enum Opcode {
OP_TST,
OP_UMLAL,
OP_UMULL,
OP_WFE,
OP_WFI,
OP_YIELD,
// Define thumb opcodes
OP_THUMB_UNDEFINED,
@ -118,6 +123,7 @@ class ARM_Disasm {
static Opcode Decode10(uint32_t insn);
static Opcode Decode11(uint32_t insn);
static Opcode DecodeMUL(uint32_t insn);
static Opcode DecodeMSRImmAndHints(uint32_t insn);
static Opcode DecodeLDRH(uint32_t insn);
static Opcode DecodeALU(uint32_t insn);
@ -135,6 +141,7 @@ class ARM_Disasm {
static std::string DisassembleMUL(Opcode opcode, uint32_t insn);
static std::string DisassembleMRS(uint32_t insn);
static std::string DisassembleMSR(uint32_t insn);
static std::string DisassembleNoOperands(Opcode opcode, uint32_t insn);
static std::string DisassemblePLD(uint32_t insn);
static std::string DisassembleSWI(uint32_t insn);
static std::string DisassembleSWP(Opcode opcode, uint32_t insn);