INSANEMODE/yuzu-android
1
0
Fork 0
mirror of https://github.com/yuzu-emu/yuzu-android.git synced 2025-06-18 21:17:58 -05:00
Code Issues Packages Projects Releases Wiki Activity

Make a GPU class in VideoCore to contain the GPU state.

Browse Source 
Also moved the GPU MemoryManager class to video_core since it makes more sense for it to be there.
This commit is contained in:
Subv
2018-02-11 23:44:12 -05:00
parent e01a8f2187
commit 6cddf9d88e
20 changed files with 125 additions and 76 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/video_core/engines/fermi_2d.cpp
View File

@ -6,10 +6,8 @@
namespace Tegra {
namespace Engines {
namespace Fermi2D {
void WriteReg(u32 method, u32 value) {}
void Fermi2D::WriteReg(u32 method, u32 value) {}
} // namespace Fermi2D
} // namespace Engines
} // namespace Tegra

10
src/video_core/engines/fermi_2d.h
View File

@ -8,11 +8,15 @@
namespace Tegra {
namespace Engines {
namespace Fermi2D {
void WriteReg(u32 method, u32 value);
class Fermi2D final {
public:
Fermi2D() = default;
~Fermi2D() = default;
} // namespace Fermi2D
/// Write the value to the register identified by method.
void WriteReg(u32 method, u32 value);
};
} // namespace Engines
} // namespace Tegra

4
src/video_core/engines/maxwell_3d.cpp
View File

@ -6,10 +6,8 @@
namespace Tegra {
namespace Engines {
namespace Maxwell3D {
void WriteReg(u32 method, u32 value) {}
void Maxwell3D::WriteReg(u32 method, u32 value) {}
} // namespace Maxwell3D
} // namespace Engines
} // namespace Tegra

10
src/video_core/engines/maxwell_3d.h
View File

@ -8,11 +8,15 @@
namespace Tegra {
namespace Engines {
namespace Maxwell3D {
void WriteReg(u32 method, u32 value);
class Maxwell3D final {
public:
Maxwell3D() = default;
~Maxwell3D() = default;
} // namespace Maxwell3D
/// Write the value to the register identified by method.
void WriteReg(u32 method, u32 value);
};
} // namespace Engines
} // namespace Tegra

4
src/video_core/engines/maxwell_compute.cpp
View File

@ -6,10 +6,8 @@
namespace Tegra {
namespace Engines {
namespace MaxwellCompute {
void WriteReg(u32 method, u32 value) {}
void MaxwellCompute::WriteReg(u32 method, u32 value) {}
} // namespace MaxwellCompute
} // namespace Engines
} // namespace Tegra

10
src/video_core/engines/maxwell_compute.h
View File

@ -8,11 +8,15 @@
namespace Tegra {
namespace Engines {
namespace MaxwellCompute {
void WriteReg(u32 method, u32 value);
class MaxwellCompute final {
public:
MaxwellCompute() = default;
~MaxwellCompute() = default;
} // namespace MaxwellCompute
/// Write the value to the register identified by method.
void WriteReg(u32 method, u32 value);
};
} // namespace Engines
} // namespace Tegra