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shader: Rename, implement FADD.SAT and P2R (imm)

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This commit is contained in:
ReinUsesLisp
2021-02-21 17:50:14 -03:00
committed by ameerj
parent e2bc05b17d
commit 704c6f353f
18 changed files with 213 additions and 127 deletions
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17
src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp
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@ -48,11 +48,11 @@ IR::U32 TranslatorVisitor::GetReg39(u64 insn) {
return X(reg.index);
}
IR::F32 TranslatorVisitor::GetReg20F(u64 insn) {
IR::F32 TranslatorVisitor::GetRegFloat20(u64 insn) {
return ir.BitCast<IR::F32>(GetReg20(insn));
}
IR::F32 TranslatorVisitor::GetReg39F(u64 insn) {
IR::F32 TranslatorVisitor::GetRegFloat39(u64 insn) {
return ir.BitCast<IR::F32>(GetReg39(insn));
}
@ -73,7 +73,7 @@ IR::U32 TranslatorVisitor::GetCbuf(u64 insn) {
return ir.GetCbuf(binding, byte_offset);
}
IR::F32 TranslatorVisitor::GetCbufF(u64 insn) {
IR::F32 TranslatorVisitor::GetFloatCbuf(u64 insn) {
return ir.BitCast<IR::F32>(GetCbuf(insn));
}
@ -88,6 +88,17 @@ IR::U32 TranslatorVisitor::GetImm20(u64 insn) {
return ir.Imm32(value);
}
IR::F32 TranslatorVisitor::GetFloatImm20(u64 insn) {
union {
u64 raw;
BitField<20, 19, u64> value;
BitField<56, 1, u64> is_negative;
} const imm{insn};
const f32 positive_value{Common::BitCast<f32>(static_cast<u32>(imm.value) << 12)};
const f32 value{imm.is_negative != 0 ? -positive_value : positive_value};
return ir.Imm32(value);
}
IR::U32 TranslatorVisitor::GetImm32(u64 insn) {
union {
u64 raw;