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https://github.com/yuzu-emu/yuzu-android.git
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Merge pull request #12236 from liamwhite/cpu-refactor
core: refactor emulated cpu core activation
This commit is contained in:
Fernando S
GitHub
@ -6,6 +6,7 @@
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#include "common/signal_chain.h"
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#include "core/arm/nce/arm_nce.h"
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#include "core/arm/nce/guest_context.h"
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#include "core/arm/nce/patcher.h"
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#include "core/core.h"
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#include "core/memory.h"
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@ -38,7 +39,7 @@ fpsimd_context* GetFloatingPointState(mcontext_t& host_ctx) {
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} // namespace
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void* ARM_NCE::RestoreGuestContext(void* raw_context) {
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void* ArmNce::RestoreGuestContext(void* raw_context) {
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// Retrieve the host context.
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auto& host_ctx = static_cast<ucontext_t*>(raw_context)->uc_mcontext;
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@ -71,7 +72,7 @@ void* ARM_NCE::RestoreGuestContext(void* raw_context) {
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return tpidr;
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}
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void ARM_NCE::SaveGuestContext(GuestContext* guest_ctx, void* raw_context) {
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void ArmNce::SaveGuestContext(GuestContext* guest_ctx, void* raw_context) {
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// Retrieve the host context.
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auto& host_ctx = static_cast<ucontext_t*>(raw_context)->uc_mcontext;
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@ -103,7 +104,7 @@ void ARM_NCE::SaveGuestContext(GuestContext* guest_ctx, void* raw_context) {
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host_ctx.regs[0] = guest_ctx->esr_el1.exchange(0);
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}
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bool ARM_NCE::HandleGuestFault(GuestContext* guest_ctx, void* raw_info, void* raw_context) {
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bool ArmNce::HandleGuestFault(GuestContext* guest_ctx, void* raw_info, void* raw_context) {
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auto& host_ctx = static_cast<ucontext_t*>(raw_context)->uc_mcontext;
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auto* info = static_cast<siginfo_t*>(raw_info);
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@ -134,7 +135,7 @@ bool ARM_NCE::HandleGuestFault(GuestContext* guest_ctx, void* raw_info, void* ra
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// - If we lose the race, then SignalInterrupt will send us a signal we are masking,
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// and it will do nothing when it is unmasked, as we have already left guest code.
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// - If we win the race, then SignalInterrupt will wait for us to unlock first.
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auto& thread_params = guest_ctx->parent->running_thread->GetNativeExecutionParameters();
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auto& thread_params = guest_ctx->parent->m_running_thread->GetNativeExecutionParameters();
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thread_params.lock.store(SpinLockLocked);
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// Return to host.
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@ -142,97 +143,93 @@ bool ARM_NCE::HandleGuestFault(GuestContext* guest_ctx, void* raw_info, void* ra
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return false;
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}
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void ARM_NCE::HandleHostFault(int sig, void* raw_info, void* raw_context) {
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void ArmNce::HandleHostFault(int sig, void* raw_info, void* raw_context) {
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return g_orig_action.sa_sigaction(sig, static_cast<siginfo_t*>(raw_info), raw_context);
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}
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HaltReason ARM_NCE::RunJit() {
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// Get the thread parameters.
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// TODO: pass the current thread down from ::Run
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auto* thread = Kernel::GetCurrentThreadPointer(system.Kernel());
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void ArmNce::LockThread(Kernel::KThread* thread) {
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auto* thread_params = &thread->GetNativeExecutionParameters();
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LockThreadParameters(thread_params);
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}
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{
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// Lock our core context.
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std::scoped_lock lk{lock};
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void ArmNce::UnlockThread(Kernel::KThread* thread) {
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auto* thread_params = &thread->GetNativeExecutionParameters();
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UnlockThreadParameters(thread_params);
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}
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// We should not be running.
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ASSERT(running_thread == nullptr);
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// Check if we need to run. If we have already been halted, we are done.
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u64 halt = guest_ctx.esr_el1.exchange(0);
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if (halt != 0) {
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return static_cast<HaltReason>(halt);
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}
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// Mark that we are running.
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running_thread = thread;
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// Acquire the lock on the thread parameters.
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// This allows us to force synchronization with SignalInterrupt.
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LockThreadParameters(thread_params);
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HaltReason ArmNce::RunThread(Kernel::KThread* thread) {
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// Check if we're already interrupted.
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// If we are, we can just return immediately.
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HaltReason hr = static_cast<HaltReason>(m_guest_ctx.esr_el1.exchange(0));
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if (True(hr)) {
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return hr;
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}
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// Assign current members.
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guest_ctx.parent = this;
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thread_params->native_context = &guest_ctx;
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thread_params->tpidr_el0 = guest_ctx.tpidr_el0;
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thread_params->tpidrro_el0 = guest_ctx.tpidrro_el0;
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thread_params->is_running = true;
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// Get the thread context.
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auto* thread_params = &thread->GetNativeExecutionParameters();
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auto* process = thread->GetOwnerProcess();
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HaltReason halt{};
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// Assign current members.
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m_running_thread = thread;
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m_guest_ctx.parent = this;
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thread_params->native_context = &m_guest_ctx;
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thread_params->tpidr_el0 = m_guest_ctx.tpidr_el0;
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thread_params->tpidrro_el0 = m_guest_ctx.tpidrro_el0;
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thread_params->is_running = true;
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// TODO: finding and creating the post handler needs to be locked
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// to deal with dynamic loading of NROs.
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const auto& post_handlers = system.ApplicationProcess()->GetPostHandlers();
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if (auto it = post_handlers.find(guest_ctx.pc); it != post_handlers.end()) {
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halt = ReturnToRunCodeByTrampoline(thread_params, &guest_ctx, it->second);
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const auto& post_handlers = process->GetPostHandlers();
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if (auto it = post_handlers.find(m_guest_ctx.pc); it != post_handlers.end()) {
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hr = ReturnToRunCodeByTrampoline(thread_params, &m_guest_ctx, it->second);
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} else {
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halt = ReturnToRunCodeByExceptionLevelChange(thread_id, thread_params);
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hr = ReturnToRunCodeByExceptionLevelChange(m_thread_id, thread_params);
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}
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// Unload members.
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// The thread does not change, so we can persist the old reference.
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guest_ctx.tpidr_el0 = thread_params->tpidr_el0;
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m_running_thread = nullptr;
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m_guest_ctx.tpidr_el0 = thread_params->tpidr_el0;
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thread_params->native_context = nullptr;
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thread_params->is_running = false;
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// Unlock the thread parameters.
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UnlockThreadParameters(thread_params);
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{
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// Lock the core context.
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std::scoped_lock lk{lock};
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// On exit, we no longer have an active thread.
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running_thread = nullptr;
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}
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// Return the halt reason.
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return halt;
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return hr;
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}
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HaltReason ARM_NCE::StepJit() {
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HaltReason ArmNce::StepThread(Kernel::KThread* thread) {
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return HaltReason::StepThread;
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}
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u32 ARM_NCE::GetSvcNumber() const {
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return guest_ctx.svc_swi;
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u32 ArmNce::GetSvcNumber() const {
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return m_guest_ctx.svc;
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}
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ARM_NCE::ARM_NCE(System& system_, bool uses_wall_clock_, std::size_t core_index_)
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: ARM_Interface{system_, uses_wall_clock_}, core_index{core_index_} {
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guest_ctx.system = &system_;
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void ArmNce::GetSvcArguments(std::span<uint64_t, 8> args) const {
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for (size_t i = 0; i < 8; i++) {
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args[i] = m_guest_ctx.cpu_registers[i];
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}
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}
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ARM_NCE::~ARM_NCE() = default;
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void ArmNce::SetSvcArguments(std::span<const uint64_t, 8> args) {
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for (size_t i = 0; i < 8; i++) {
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m_guest_ctx.cpu_registers[i] = args[i];
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}
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}
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void ARM_NCE::Initialize() {
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thread_id = gettid();
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ArmNce::ArmNce(System& system, bool uses_wall_clock, std::size_t core_index)
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: ArmInterface{uses_wall_clock}, m_system{system}, m_core_index{core_index} {
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m_guest_ctx.system = &m_system;
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}
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ArmNce::~ArmNce() = default;
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void ArmNce::Initialize() {
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m_thread_id = gettid();
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// Setup our signals
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static std::once_flag flag;
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std::call_once(flag, [] {
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static std::once_flag signals;
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std::call_once(signals, [] {
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using HandlerType = decltype(sigaction::sa_sigaction);
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sigset_t signal_mask;
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@ -244,7 +241,7 @@ void ARM_NCE::Initialize() {
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struct sigaction return_to_run_code_action {};
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return_to_run_code_action.sa_flags = SA_SIGINFO | SA_ONSTACK;
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return_to_run_code_action.sa_sigaction = reinterpret_cast<HandlerType>(
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&ARM_NCE::ReturnToRunCodeByExceptionLevelChangeSignalHandler);
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&ArmNce::ReturnToRunCodeByExceptionLevelChangeSignalHandler);
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return_to_run_code_action.sa_mask = signal_mask;
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Common::SigAction(ReturnToRunCodeByExceptionLevelChangeSignal, &return_to_run_code_action,
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nullptr);
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@ -252,14 +249,13 @@ void ARM_NCE::Initialize() {
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struct sigaction break_from_run_code_action {};
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break_from_run_code_action.sa_flags = SA_SIGINFO | SA_ONSTACK;
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break_from_run_code_action.sa_sigaction =
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reinterpret_cast<HandlerType>(&ARM_NCE::BreakFromRunCodeSignalHandler);
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reinterpret_cast<HandlerType>(&ArmNce::BreakFromRunCodeSignalHandler);
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break_from_run_code_action.sa_mask = signal_mask;
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Common::SigAction(BreakFromRunCodeSignal, &break_from_run_code_action, nullptr);
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struct sigaction fault_action {};
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fault_action.sa_flags = SA_SIGINFO | SA_ONSTACK | SA_RESTART;
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fault_action.sa_sigaction =
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reinterpret_cast<HandlerType>(&ARM_NCE::GuestFaultSignalHandler);
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fault_action.sa_sigaction = reinterpret_cast<HandlerType>(&ArmNce::GuestFaultSignalHandler);
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fault_action.sa_mask = signal_mask;
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Common::SigAction(GuestFaultSignal, &fault_action, &g_orig_action);
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@ -272,111 +268,59 @@ void ARM_NCE::Initialize() {
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});
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}
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void ARM_NCE::SetPC(u64 pc) {
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guest_ctx.pc = pc;
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void ArmNce::SetTpidrroEl0(u64 value) {
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m_guest_ctx.tpidrro_el0 = value;
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}
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u64 ARM_NCE::GetPC() const {
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return guest_ctx.pc;
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}
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u64 ARM_NCE::GetSP() const {
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return guest_ctx.sp;
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}
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u64 ARM_NCE::GetReg(int index) const {
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return guest_ctx.cpu_registers[index];
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}
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void ARM_NCE::SetReg(int index, u64 value) {
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guest_ctx.cpu_registers[index] = value;
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}
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u128 ARM_NCE::GetVectorReg(int index) const {
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return guest_ctx.vector_registers[index];
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}
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void ARM_NCE::SetVectorReg(int index, u128 value) {
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guest_ctx.vector_registers[index] = value;
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}
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u32 ARM_NCE::GetPSTATE() const {
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return guest_ctx.pstate;
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}
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void ARM_NCE::SetPSTATE(u32 pstate) {
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guest_ctx.pstate = pstate;
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}
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u64 ARM_NCE::GetTlsAddress() const {
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return guest_ctx.tpidrro_el0;
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}
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void ARM_NCE::SetTlsAddress(u64 address) {
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guest_ctx.tpidrro_el0 = address;
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}
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u64 ARM_NCE::GetTPIDR_EL0() const {
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return guest_ctx.tpidr_el0;
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}
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void ARM_NCE::SetTPIDR_EL0(u64 value) {
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guest_ctx.tpidr_el0 = value;
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}
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void ARM_NCE::SaveContext(ThreadContext64& ctx) const {
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ctx.cpu_registers = guest_ctx.cpu_registers;
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ctx.sp = guest_ctx.sp;
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ctx.pc = guest_ctx.pc;
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ctx.pstate = guest_ctx.pstate;
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ctx.vector_registers = guest_ctx.vector_registers;
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ctx.fpcr = guest_ctx.fpcr;
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ctx.fpsr = guest_ctx.fpsr;
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ctx.tpidr = guest_ctx.tpidr_el0;
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}
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void ARM_NCE::LoadContext(const ThreadContext64& ctx) {
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guest_ctx.cpu_registers = ctx.cpu_registers;
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guest_ctx.sp = ctx.sp;
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guest_ctx.pc = ctx.pc;
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guest_ctx.pstate = ctx.pstate;
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guest_ctx.vector_registers = ctx.vector_registers;
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guest_ctx.fpcr = ctx.fpcr;
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guest_ctx.fpsr = ctx.fpsr;
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guest_ctx.tpidr_el0 = ctx.tpidr;
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}
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void ARM_NCE::SignalInterrupt() {
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// Lock core context.
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std::scoped_lock lk{lock};
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// Add break loop condition.
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guest_ctx.esr_el1.fetch_or(static_cast<u64>(HaltReason::BreakLoop));
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// If there is no thread running, we are done.
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if (running_thread == nullptr) {
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return;
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void ArmNce::GetContext(Kernel::Svc::ThreadContext& ctx) const {
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for (size_t i = 0; i < 29; i++) {
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ctx.r[i] = m_guest_ctx.cpu_registers[i];
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}
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ctx.fp = m_guest_ctx.cpu_registers[29];
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ctx.lr = m_guest_ctx.cpu_registers[30];
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ctx.sp = m_guest_ctx.sp;
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ctx.pc = m_guest_ctx.pc;
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ctx.pstate = m_guest_ctx.pstate;
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ctx.v = m_guest_ctx.vector_registers;
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ctx.fpcr = m_guest_ctx.fpcr;
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ctx.fpsr = m_guest_ctx.fpsr;
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ctx.tpidr = m_guest_ctx.tpidr_el0;
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}
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void ArmNce::SetContext(const Kernel::Svc::ThreadContext& ctx) {
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for (size_t i = 0; i < 29; i++) {
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m_guest_ctx.cpu_registers[i] = ctx.r[i];
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}
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m_guest_ctx.cpu_registers[29] = ctx.fp;
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m_guest_ctx.cpu_registers[30] = ctx.lr;
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m_guest_ctx.sp = ctx.sp;
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m_guest_ctx.pc = ctx.pc;
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m_guest_ctx.pstate = ctx.pstate;
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m_guest_ctx.vector_registers = ctx.v;
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m_guest_ctx.fpcr = ctx.fpcr;
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m_guest_ctx.fpsr = ctx.fpsr;
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m_guest_ctx.tpidr_el0 = ctx.tpidr;
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}
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void ArmNce::SignalInterrupt(Kernel::KThread* thread) {
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// Add break loop condition.
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m_guest_ctx.esr_el1.fetch_or(static_cast<u64>(HaltReason::BreakLoop));
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// Lock the thread context.
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auto* params = &running_thread->GetNativeExecutionParameters();
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auto* params = &thread->GetNativeExecutionParameters();
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LockThreadParameters(params);
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if (params->is_running) {
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// We should signal to the running thread.
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// The running thread will unlock the thread context.
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syscall(SYS_tkill, thread_id, BreakFromRunCodeSignal);
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syscall(SYS_tkill, m_thread_id, BreakFromRunCodeSignal);
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} else {
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// If the thread is no longer running, we have nothing to do.
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UnlockThreadParameters(params);
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}
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}
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void ARM_NCE::ClearInterrupt() {
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guest_ctx.esr_el1 = {};
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}
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void ARM_NCE::ClearInstructionCache() {
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void ArmNce::ClearInstructionCache() {
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// TODO: This is not possible to implement correctly on Linux because
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// we do not have any access to ic iallu.
|
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|
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@ -384,17 +328,8 @@ void ARM_NCE::ClearInstructionCache() {
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std::atomic_thread_fence(std::memory_order_seq_cst);
|
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}
|
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|
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void ARM_NCE::InvalidateCacheRange(u64 addr, std::size_t size) {
|
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void ArmNce::InvalidateCacheRange(u64 addr, std::size_t size) {
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this->ClearInstructionCache();
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}
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|
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void ARM_NCE::ClearExclusiveState() {
|
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// No-op.
|
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}
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|
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void ARM_NCE::PageTableChanged(Common::PageTable& page_table,
|
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std::size_t new_address_space_size_in_bits) {
|
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// No-op. Page table is never used.
|
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}
|
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|
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} // namespace Core
|
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|
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@ -3,11 +3,7 @@
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|
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#pragma once
|
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|
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#include <atomic>
|
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#include <memory>
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#include <span>
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#include <unordered_map>
|
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#include <vector>
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#include <mutex>
|
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|
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#include "core/arm/arm_interface.h"
|
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#include "core/arm/nce/guest_context.h"
|
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@ -20,51 +16,36 @@ namespace Core {
|
||||
|
||||
class System;
|
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|
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class ARM_NCE final : public ARM_Interface {
|
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class ArmNce final : public ArmInterface {
|
||||
public:
|
||||
ARM_NCE(System& system_, bool uses_wall_clock_, std::size_t core_index_);
|
||||
|
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~ARM_NCE() override;
|
||||
ArmNce(System& system, bool uses_wall_clock, std::size_t core_index);
|
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~ArmNce() override;
|
||||
|
||||
void Initialize() override;
|
||||
void SetPC(u64 pc) override;
|
||||
u64 GetPC() const override;
|
||||
u64 GetSP() const override;
|
||||
u64 GetReg(int index) const override;
|
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void SetReg(int index, u64 value) override;
|
||||
u128 GetVectorReg(int index) const override;
|
||||
void SetVectorReg(int index, u128 value) override;
|
||||
|
||||
u32 GetPSTATE() const override;
|
||||
void SetPSTATE(u32 pstate) override;
|
||||
u64 GetTlsAddress() const override;
|
||||
void SetTlsAddress(u64 address) override;
|
||||
void SetTPIDR_EL0(u64 value) override;
|
||||
u64 GetTPIDR_EL0() const override;
|
||||
|
||||
Architecture GetArchitecture() const override {
|
||||
return Architecture::Aarch64;
|
||||
return Architecture::AArch64;
|
||||
}
|
||||
|
||||
void SaveContext(ThreadContext32& ctx) const override {}
|
||||
void SaveContext(ThreadContext64& ctx) const override;
|
||||
void LoadContext(const ThreadContext32& ctx) override {}
|
||||
void LoadContext(const ThreadContext64& ctx) override;
|
||||
HaltReason RunThread(Kernel::KThread* thread) override;
|
||||
HaltReason StepThread(Kernel::KThread* thread) override;
|
||||
|
||||
void SignalInterrupt() override;
|
||||
void ClearInterrupt() override;
|
||||
void ClearExclusiveState() override;
|
||||
void ClearInstructionCache() override;
|
||||
void InvalidateCacheRange(u64 addr, std::size_t size) override;
|
||||
void PageTableChanged(Common::PageTable& new_page_table,
|
||||
std::size_t new_address_space_size_in_bits) override;
|
||||
|
||||
protected:
|
||||
HaltReason RunJit() override;
|
||||
HaltReason StepJit() override;
|
||||
void GetContext(Kernel::Svc::ThreadContext& ctx) const override;
|
||||
void SetContext(const Kernel::Svc::ThreadContext& ctx) override;
|
||||
void SetTpidrroEl0(u64 value) override;
|
||||
|
||||
void GetSvcArguments(std::span<uint64_t, 8> args) const override;
|
||||
void SetSvcArguments(std::span<const uint64_t, 8> args) override;
|
||||
u32 GetSvcNumber() const override;
|
||||
|
||||
void SignalInterrupt(Kernel::KThread* thread) override;
|
||||
void ClearInstructionCache() override;
|
||||
void InvalidateCacheRange(u64 addr, std::size_t size) override;
|
||||
|
||||
void LockThread(Kernel::KThread* thread) override;
|
||||
void UnlockThread(Kernel::KThread* thread) override;
|
||||
|
||||
protected:
|
||||
const Kernel::DebugWatchpoint* HaltedWatchpoint() const override {
|
||||
return nullptr;
|
||||
}
|
||||
@ -93,16 +74,15 @@ private:
|
||||
static void HandleHostFault(int sig, void* info, void* raw_context);
|
||||
|
||||
public:
|
||||
Core::System& m_system;
|
||||
|
||||
// Members set on initialization.
|
||||
std::size_t core_index{};
|
||||
pid_t thread_id{-1};
|
||||
std::size_t m_core_index{};
|
||||
pid_t m_thread_id{-1};
|
||||
|
||||
// Core context.
|
||||
GuestContext guest_ctx;
|
||||
|
||||
// Thread and invalidation info.
|
||||
std::mutex lock;
|
||||
Kernel::KThread* running_thread{};
|
||||
GuestContext m_guest_ctx{};
|
||||
Kernel::KThread* m_running_thread{};
|
||||
};
|
||||
|
||||
} // namespace Core
|
||||
|
||||
@ -8,11 +8,11 @@
|
||||
movk reg, #(((val) >> 0x10) & 0xFFFF), lsl #16
|
||||
|
||||
|
||||
/* static HaltReason Core::ARM_NCE::ReturnToRunCodeByTrampoline(void* tpidr, Core::GuestContext* ctx, u64 trampoline_addr) */
|
||||
.section .text._ZN4Core7ARM_NCE27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm, "ax", %progbits
|
||||
.global _ZN4Core7ARM_NCE27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm
|
||||
.type _ZN4Core7ARM_NCE27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm, %function
|
||||
_ZN4Core7ARM_NCE27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm:
|
||||
/* static HaltReason Core::ArmNce::ReturnToRunCodeByTrampoline(void* tpidr, Core::GuestContext* ctx, u64 trampoline_addr) */
|
||||
.section .text._ZN4Core6ArmNce27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm, "ax", %progbits
|
||||
.global _ZN4Core6ArmNce27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm
|
||||
.type _ZN4Core6ArmNce27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm, %function
|
||||
_ZN4Core6ArmNce27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm:
|
||||
/* Back up host sp to x3. */
|
||||
/* Back up host tpidr_el0 to x4. */
|
||||
mov x3, sp
|
||||
@ -49,11 +49,11 @@ _ZN4Core7ARM_NCE27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm:
|
||||
br x2
|
||||
|
||||
|
||||
/* static HaltReason Core::ARM_NCE::ReturnToRunCodeByExceptionLevelChange(int tid, void* tpidr) */
|
||||
.section .text._ZN4Core7ARM_NCE37ReturnToRunCodeByExceptionLevelChangeEiPv, "ax", %progbits
|
||||
.global _ZN4Core7ARM_NCE37ReturnToRunCodeByExceptionLevelChangeEiPv
|
||||
.type _ZN4Core7ARM_NCE37ReturnToRunCodeByExceptionLevelChangeEiPv, %function
|
||||
_ZN4Core7ARM_NCE37ReturnToRunCodeByExceptionLevelChangeEiPv:
|
||||
/* static HaltReason Core::ArmNce::ReturnToRunCodeByExceptionLevelChange(int tid, void* tpidr) */
|
||||
.section .text._ZN4Core6ArmNce37ReturnToRunCodeByExceptionLevelChangeEiPv, "ax", %progbits
|
||||
.global _ZN4Core6ArmNce37ReturnToRunCodeByExceptionLevelChangeEiPv
|
||||
.type _ZN4Core6ArmNce37ReturnToRunCodeByExceptionLevelChangeEiPv, %function
|
||||
_ZN4Core6ArmNce37ReturnToRunCodeByExceptionLevelChangeEiPv:
|
||||
/* This jumps to the signal handler, which will restore the entire context. */
|
||||
/* On entry, x0 = thread id, which is already in the right place. */
|
||||
|
||||
@ -71,17 +71,17 @@ _ZN4Core7ARM_NCE37ReturnToRunCodeByExceptionLevelChangeEiPv:
|
||||
brk #1000
|
||||
|
||||
|
||||
/* static void Core::ARM_NCE::ReturnToRunCodeByExceptionLevelChangeSignalHandler(int sig, void* info, void* raw_context) */
|
||||
.section .text._ZN4Core7ARM_NCE50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_, "ax", %progbits
|
||||
.global _ZN4Core7ARM_NCE50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_
|
||||
.type _ZN4Core7ARM_NCE50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_, %function
|
||||
_ZN4Core7ARM_NCE50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_:
|
||||
/* static void Core::ArmNce::ReturnToRunCodeByExceptionLevelChangeSignalHandler(int sig, void* info, void* raw_context) */
|
||||
.section .text._ZN4Core6ArmNce50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_, "ax", %progbits
|
||||
.global _ZN4Core6ArmNce50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_
|
||||
.type _ZN4Core6ArmNce50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_, %function
|
||||
_ZN4Core6ArmNce50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_:
|
||||
stp x29, x30, [sp, #-0x10]!
|
||||
mov x29, sp
|
||||
|
||||
/* Call the context restorer with the raw context. */
|
||||
mov x0, x2
|
||||
bl _ZN4Core7ARM_NCE19RestoreGuestContextEPv
|
||||
bl _ZN4Core6ArmNce19RestoreGuestContextEPv
|
||||
|
||||
/* Save the old value of tpidr_el0. */
|
||||
mrs x8, tpidr_el0
|
||||
@ -92,18 +92,18 @@ _ZN4Core7ARM_NCE50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_:
|
||||
msr tpidr_el0, x0
|
||||
|
||||
/* Unlock the context. */
|
||||
bl _ZN4Core7ARM_NCE22UnlockThreadParametersEPv
|
||||
bl _ZN4Core6ArmNce22UnlockThreadParametersEPv
|
||||
|
||||
/* Returning from here will enter the guest. */
|
||||
ldp x29, x30, [sp], #0x10
|
||||
ret
|
||||
|
||||
|
||||
/* static void Core::ARM_NCE::BreakFromRunCodeSignalHandler(int sig, void* info, void* raw_context) */
|
||||
.section .text._ZN4Core7ARM_NCE29BreakFromRunCodeSignalHandlerEiPvS1_, "ax", %progbits
|
||||
.global _ZN4Core7ARM_NCE29BreakFromRunCodeSignalHandlerEiPvS1_
|
||||
.type _ZN4Core7ARM_NCE29BreakFromRunCodeSignalHandlerEiPvS1_, %function
|
||||
_ZN4Core7ARM_NCE29BreakFromRunCodeSignalHandlerEiPvS1_:
|
||||
/* static void Core::ArmNce::BreakFromRunCodeSignalHandler(int sig, void* info, void* raw_context) */
|
||||
.section .text._ZN4Core6ArmNce29BreakFromRunCodeSignalHandlerEiPvS1_, "ax", %progbits
|
||||
.global _ZN4Core6ArmNce29BreakFromRunCodeSignalHandlerEiPvS1_
|
||||
.type _ZN4Core6ArmNce29BreakFromRunCodeSignalHandlerEiPvS1_, %function
|
||||
_ZN4Core6ArmNce29BreakFromRunCodeSignalHandlerEiPvS1_:
|
||||
/* Check to see if we have the correct TLS magic. */
|
||||
mrs x8, tpidr_el0
|
||||
ldr w9, [x8, #(TpidrEl0TlsMagic)]
|
||||
@ -121,7 +121,7 @@ _ZN4Core7ARM_NCE29BreakFromRunCodeSignalHandlerEiPvS1_:
|
||||
|
||||
/* Tail call the restorer. */
|
||||
mov x1, x2
|
||||
b _ZN4Core7ARM_NCE16SaveGuestContextEPNS_12GuestContextEPv
|
||||
b _ZN4Core6ArmNce16SaveGuestContextEPNS_12GuestContextEPv
|
||||
|
||||
/* Returning from here will enter host code. */
|
||||
|
||||
@ -130,11 +130,11 @@ _ZN4Core7ARM_NCE29BreakFromRunCodeSignalHandlerEiPvS1_:
|
||||
ret
|
||||
|
||||
|
||||
/* static void Core::ARM_NCE::GuestFaultSignalHandler(int sig, void* info, void* raw_context) */
|
||||
.section .text._ZN4Core7ARM_NCE23GuestFaultSignalHandlerEiPvS1_, "ax", %progbits
|
||||
.global _ZN4Core7ARM_NCE23GuestFaultSignalHandlerEiPvS1_
|
||||
.type _ZN4Core7ARM_NCE23GuestFaultSignalHandlerEiPvS1_, %function
|
||||
_ZN4Core7ARM_NCE23GuestFaultSignalHandlerEiPvS1_:
|
||||
/* static void Core::ArmNce::GuestFaultSignalHandler(int sig, void* info, void* raw_context) */
|
||||
.section .text._ZN4Core6ArmNce23GuestFaultSignalHandlerEiPvS1_, "ax", %progbits
|
||||
.global _ZN4Core6ArmNce23GuestFaultSignalHandlerEiPvS1_
|
||||
.type _ZN4Core6ArmNce23GuestFaultSignalHandlerEiPvS1_, %function
|
||||
_ZN4Core6ArmNce23GuestFaultSignalHandlerEiPvS1_:
|
||||
/* Check to see if we have the correct TLS magic. */
|
||||
mrs x8, tpidr_el0
|
||||
ldr w9, [x8, #(TpidrEl0TlsMagic)]
|
||||
@ -146,7 +146,7 @@ _ZN4Core7ARM_NCE23GuestFaultSignalHandlerEiPvS1_:
|
||||
|
||||
/* Incorrect TLS magic, so this is a host fault. */
|
||||
/* Tail call the handler. */
|
||||
b _ZN4Core7ARM_NCE15HandleHostFaultEiPvS1_
|
||||
b _ZN4Core6ArmNce15HandleHostFaultEiPvS1_
|
||||
|
||||
1:
|
||||
/* Correct TLS magic, so this is a guest fault. */
|
||||
@ -163,7 +163,7 @@ _ZN4Core7ARM_NCE23GuestFaultSignalHandlerEiPvS1_:
|
||||
msr tpidr_el0, x3
|
||||
|
||||
/* Call the handler. */
|
||||
bl _ZN4Core7ARM_NCE16HandleGuestFaultEPNS_12GuestContextEPvS3_
|
||||
bl _ZN4Core6ArmNce16HandleGuestFaultEPNS_12GuestContextEPvS3_
|
||||
|
||||
/* If the handler returned false, we want to preserve the host tpidr_el0. */
|
||||
cbz x0, 2f
|
||||
@ -177,11 +177,11 @@ _ZN4Core7ARM_NCE23GuestFaultSignalHandlerEiPvS1_:
|
||||
ret
|
||||
|
||||
|
||||
/* static void Core::ARM_NCE::LockThreadParameters(void* tpidr) */
|
||||
.section .text._ZN4Core7ARM_NCE20LockThreadParametersEPv, "ax", %progbits
|
||||
.global _ZN4Core7ARM_NCE20LockThreadParametersEPv
|
||||
.type _ZN4Core7ARM_NCE20LockThreadParametersEPv, %function
|
||||
_ZN4Core7ARM_NCE20LockThreadParametersEPv:
|
||||
/* static void Core::ArmNce::LockThreadParameters(void* tpidr) */
|
||||
.section .text._ZN4Core6ArmNce20LockThreadParametersEPv, "ax", %progbits
|
||||
.global _ZN4Core6ArmNce20LockThreadParametersEPv
|
||||
.type _ZN4Core6ArmNce20LockThreadParametersEPv, %function
|
||||
_ZN4Core6ArmNce20LockThreadParametersEPv:
|
||||
/* Offset to lock member. */
|
||||
add x0, x0, #(TpidrEl0Lock)
|
||||
|
||||
@ -205,11 +205,11 @@ _ZN4Core7ARM_NCE20LockThreadParametersEPv:
|
||||
ret
|
||||
|
||||
|
||||
/* static void Core::ARM_NCE::UnlockThreadParameters(void* tpidr) */
|
||||
.section .text._ZN4Core7ARM_NCE22UnlockThreadParametersEPv, "ax", %progbits
|
||||
.global _ZN4Core7ARM_NCE22UnlockThreadParametersEPv
|
||||
.type _ZN4Core7ARM_NCE22UnlockThreadParametersEPv, %function
|
||||
_ZN4Core7ARM_NCE22UnlockThreadParametersEPv:
|
||||
/* static void Core::ArmNce::UnlockThreadParameters(void* tpidr) */
|
||||
.section .text._ZN4Core6ArmNce22UnlockThreadParametersEPv, "ax", %progbits
|
||||
.global _ZN4Core6ArmNce22UnlockThreadParametersEPv
|
||||
.type _ZN4Core6ArmNce22UnlockThreadParametersEPv, %function
|
||||
_ZN4Core6ArmNce22UnlockThreadParametersEPv:
|
||||
/* Offset to lock member. */
|
||||
add x0, x0, #(TpidrEl0Lock)
|
||||
|
||||
|
||||
@ -3,6 +3,8 @@
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <atomic>
|
||||
|
||||
#include "common/common_funcs.h"
|
||||
#include "common/common_types.h"
|
||||
#include "core/arm/arm_interface.h"
|
||||
@ -10,7 +12,7 @@
|
||||
|
||||
namespace Core {
|
||||
|
||||
class ARM_NCE;
|
||||
class ArmNce;
|
||||
class System;
|
||||
|
||||
struct HostContext {
|
||||
@ -33,9 +35,9 @@ struct GuestContext {
|
||||
u64 tpidr_el0{};
|
||||
std::atomic<u64> esr_el1{};
|
||||
u32 nzcv{};
|
||||
u32 svc_swi{};
|
||||
u32 svc{};
|
||||
System* system{};
|
||||
ARM_NCE* parent{};
|
||||
ArmNce* parent{};
|
||||
};
|
||||
|
||||
// Verify assembly offsets.
|
||||
|
||||
@ -280,7 +280,7 @@ void Patcher::WriteSvcTrampoline(ModuleDestLabel module_dest, u32 svc_id) {
|
||||
|
||||
// Store SVC number to execute when we return
|
||||
c.MOV(X2, svc_id);
|
||||
c.STR(W2, X1, offsetof(GuestContext, svc_swi));
|
||||
c.STR(W2, X1, offsetof(GuestContext, svc));
|
||||
|
||||
// We are calling a SVC. Clear esr_el1 and return it.
|
||||
static_assert(std::is_same_v<std::underlying_type_t<HaltReason>, u64>);
|
||||
|
||||
Reference in New Issue
Block a user