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shader: Read branch conditions from an instruction

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Fixes the identity removal pass.
This commit is contained in:
ReinUsesLisp
2021-05-18 02:04:22 -03:00
committed by ameerj
parent 4bad415bca
commit 9bb3e008c9
12 changed files with 36 additions and 16 deletions
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8
src/shader_recompiler/frontend/ir/ir_emitter.cpp
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@ -61,8 +61,12 @@ F64 IREmitter::Imm64(f64 value) const {
return F64{Value{value}};
}
void IREmitter::DummyReference(const Value& value) {
Inst(Opcode::DummyReference, value);
U1 IREmitter::ConditionRef(const U1& value) {
return Inst<U1>(Opcode::ConditionRef, value);
}
void IREmitter::Reference(const Value& value) {
Inst(Opcode::Reference, value);
}
void IREmitter::PhiMove(IR::Inst& phi, const Value& value) {

4
src/shader_recompiler/frontend/ir/ir_emitter.h
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@ -32,7 +32,9 @@ public:
[[nodiscard]] U64 Imm64(s64 value) const;
[[nodiscard]] F64 Imm64(f64 value) const;
void DummyReference(const Value& value);
U1 ConditionRef(const U1& value);
void Reference(const Value& value);
void PhiMove(IR::Inst& phi, const Value& value);
void Prologue();

3
src/shader_recompiler/frontend/ir/microinstruction.cpp
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@ -56,7 +56,8 @@ Inst::~Inst() {
bool Inst::MayHaveSideEffects() const noexcept {
switch (op) {
case Opcode::DummyReference:
case Opcode::ConditionRef:
case Opcode::Reference:
case Opcode::PhiMove:
case Opcode::Prologue:
case Opcode::Epilogue:

3
src/shader_recompiler/frontend/ir/opcodes.inc
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@ -6,7 +6,8 @@
OPCODE(Phi, Opaque, )
OPCODE(Identity, Opaque, Opaque, )
OPCODE(Void, Void, )
OPCODE(DummyReference, Void, Opaque, )
OPCODE(ConditionRef, U1, U1, )
OPCODE(Reference, Void, Opaque, )
OPCODE(PhiMove, Void, Opaque, Opaque, )
// Special operations

9
src/shader_recompiler/frontend/maxwell/structured_control_flow.cpp
View File

@ -703,8 +703,7 @@ private:
// Implement if header block
IR::IREmitter ir{*current_block};
const IR::U1 cond{VisitExpr(ir, *stmt.cond)};
ir.DummyReference(cond);
const IR::U1 cond{ir.ConditionRef(VisitExpr(ir, *stmt.cond))};
const size_t if_node_index{syntax_list.size()};
syntax_list.emplace_back();
@ -754,8 +753,7 @@ private:
// The continue block is located at the end of the loop
IR::IREmitter ir{*continue_block};
const IR::U1 cond{VisitExpr(ir, *stmt.cond)};
ir.DummyReference(cond);
const IR::U1 cond{ir.ConditionRef(VisitExpr(ir, *stmt.cond))};
IR::Block* const body_block{syntax_list.at(body_block_index).data.block};
loop_header_block->AddBranch(body_block);
@ -791,8 +789,7 @@ private:
IR::Block* const skip_block{MergeBlock(parent, stmt)};
IR::IREmitter ir{*current_block};
const IR::U1 cond{VisitExpr(ir, *stmt.cond)};
ir.DummyReference(cond);
const IR::U1 cond{ir.ConditionRef(VisitExpr(ir, *stmt.cond))};
current_block->AddBranch(break_block);
current_block->AddBranch(skip_block);
current_block = skip_block;