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core: Implement separate A32/A64 ARM interfaces.
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@ -25,7 +25,20 @@ public:
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explicit ARM_Interface(System& system_) : system{system_} {}
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virtual ~ARM_Interface() = default;
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struct ThreadContext {
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struct ThreadContext32 {
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std::array<u32, 16> cpu_registers;
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u32 cpsr;
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std::array<u8, 4> padding;
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std::array<u64, 32> fprs;
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u32 fpscr;
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u32 fpexc;
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u32 tpidr;
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};
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// Internally within the kernel, it expects the AArch32 version of the
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// thread context to be 344 bytes in size.
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static_assert(sizeof(ThreadContext32) == 0x158);
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struct ThreadContext64 {
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std::array<u64, 31> cpu_registers;
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u64 sp;
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u64 pc;
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@ -38,7 +51,7 @@ public:
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};
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// Internally within the kernel, it expects the AArch64 version of the
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// thread context to be 800 bytes in size.
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static_assert(sizeof(ThreadContext) == 0x320);
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static_assert(sizeof(ThreadContext64) == 0x320);
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/// Runs the CPU until an event happens
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virtual void Run() = 0;
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@ -130,17 +143,10 @@ public:
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*/
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virtual void SetTPIDR_EL0(u64 value) = 0;
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/**
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* Saves the current CPU context
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* @param ctx Thread context to save
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*/
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virtual void SaveContext(ThreadContext& ctx) = 0;
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/**
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* Loads a CPU context
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* @param ctx Thread context to load
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*/
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virtual void LoadContext(const ThreadContext& ctx) = 0;
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virtual void SaveContext(ThreadContext32& ctx) = 0;
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virtual void SaveContext(ThreadContext64& ctx) = 0;
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virtual void LoadContext(const ThreadContext32& ctx) = 0;
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virtual void LoadContext(const ThreadContext64& ctx) = 0;
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/// Clears the exclusive monitor's state.
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virtual void ClearExclusiveState() = 0;
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