mirror of
https://github.com/yuzu-emu/yuzu-android.git
synced 2025-06-13 08:58:00 -05:00
Sources: Run clang-format on everything.
This commit is contained in:
@ -40,7 +40,7 @@ struct CallStackElement {
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u32 loop_address; // The address where we'll return to after each loop iteration
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};
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template<bool Debug>
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template <bool Debug>
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void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned offset) {
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// TODO: Is there a maximal size for this?
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boost::container::static_vector<CallStackElement, 16> call_stack;
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@ -74,14 +74,18 @@ void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned
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}
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}
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const Instruction instr = { program_code[program_counter] };
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const SwizzlePattern swizzle = { swizzle_data[instr.common.operand_desc_id] };
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const Instruction instr = {program_code[program_counter]};
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const SwizzlePattern swizzle = {swizzle_data[instr.common.operand_desc_id]};
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auto call = [&program_counter, &call_stack](UnitState<Debug>& state, u32 offset, u32 num_instructions,
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u32 return_offset, u8 repeat_count, u8 loop_increment) {
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program_counter = offset - 1; // -1 to make sure when incrementing the PC we end up at the correct offset
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auto call = [&program_counter, &call_stack](UnitState<Debug>& state, u32 offset,
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u32 num_instructions, u32 return_offset,
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u8 repeat_count, u8 loop_increment) {
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program_counter =
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offset -
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1; // -1 to make sure when incrementing the PC we end up at the correct offset
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ASSERT(call_stack.size() < call_stack.capacity());
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call_stack.push_back({ offset + num_instructions, return_offset, repeat_count, loop_increment, offset });
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call_stack.push_back(
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{offset + num_instructions, return_offset, repeat_count, loop_increment, offset});
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};
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Record<DebugDataRecord::CUR_INSTR>(state.debug, iteration, program_counter);
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if (iteration > 0)
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@ -106,24 +110,26 @@ void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned
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};
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switch (instr.opcode.Value().GetInfo().type) {
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case OpCode::Type::Arithmetic:
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{
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const bool is_inverted = (0 != (instr.opcode.Value().GetInfo().subtype & OpCode::Info::SrcInversed));
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case OpCode::Type::Arithmetic: {
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const bool is_inverted =
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(0 != (instr.opcode.Value().GetInfo().subtype & OpCode::Info::SrcInversed));
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const int address_offset = (instr.common.address_register_index == 0)
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? 0 : state.address_registers[instr.common.address_register_index - 1];
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const int address_offset =
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(instr.common.address_register_index == 0)
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? 0
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: state.address_registers[instr.common.address_register_index - 1];
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const float24* src1_ = LookupSourceRegister(instr.common.GetSrc1(is_inverted) + (!is_inverted * address_offset));
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const float24* src2_ = LookupSourceRegister(instr.common.GetSrc2(is_inverted) + ( is_inverted * address_offset));
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const float24* src1_ = LookupSourceRegister(instr.common.GetSrc1(is_inverted) +
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(!is_inverted * address_offset));
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const float24* src2_ = LookupSourceRegister(instr.common.GetSrc2(is_inverted) +
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(is_inverted * address_offset));
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const bool negate_src1 = ((bool)swizzle.negate_src1 != false);
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const bool negate_src2 = ((bool)swizzle.negate_src2 != false);
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float24 src1[4] = {
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src1_[(int)swizzle.GetSelectorSrc1(0)],
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src1_[(int)swizzle.GetSelectorSrc1(1)],
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src1_[(int)swizzle.GetSelectorSrc1(2)],
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src1_[(int)swizzle.GetSelectorSrc1(3)],
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src1_[(int)swizzle.GetSelectorSrc1(0)], src1_[(int)swizzle.GetSelectorSrc1(1)],
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src1_[(int)swizzle.GetSelectorSrc1(2)], src1_[(int)swizzle.GetSelectorSrc1(3)],
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};
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if (negate_src1) {
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src1[0] = src1[0] * float24::FromFloat32(-1);
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@ -132,10 +138,8 @@ void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned
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src1[3] = src1[3] * float24::FromFloat32(-1);
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}
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float24 src2[4] = {
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src2_[(int)swizzle.GetSelectorSrc2(0)],
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src2_[(int)swizzle.GetSelectorSrc2(1)],
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src2_[(int)swizzle.GetSelectorSrc2(2)],
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src2_[(int)swizzle.GetSelectorSrc2(3)],
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src2_[(int)swizzle.GetSelectorSrc2(0)], src2_[(int)swizzle.GetSelectorSrc2(1)],
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src2_[(int)swizzle.GetSelectorSrc2(2)], src2_[(int)swizzle.GetSelectorSrc2(3)],
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};
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if (negate_src2) {
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src2[0] = src2[0] * float24::FromFloat32(-1);
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@ -144,15 +148,18 @@ void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned
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src2[3] = src2[3] * float24::FromFloat32(-1);
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}
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float24* dest = (instr.common.dest.Value() < 0x10) ? &state.output_registers.value[instr.common.dest.Value().GetIndex()][0]
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: (instr.common.dest.Value() < 0x20) ? &state.registers.temporary[instr.common.dest.Value().GetIndex()][0]
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: dummy_vec4_float24;
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float24* dest =
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(instr.common.dest.Value() < 0x10)
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? &state.output_registers.value[instr.common.dest.Value().GetIndex()][0]
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: (instr.common.dest.Value() < 0x20)
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? &state.registers.temporary[instr.common.dest.Value().GetIndex()][0]
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: dummy_vec4_float24;
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state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id);
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state.debug.max_opdesc_id =
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std::max<u32>(state.debug.max_opdesc_id, 1 + instr.common.operand_desc_id);
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switch (instr.opcode.Value().EffectiveOpCode()) {
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case OpCode::Id::ADD:
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{
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case OpCode::Id::ADD: {
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Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
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Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
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Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
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@ -166,8 +173,7 @@ void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned
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break;
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}
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case OpCode::Id::MUL:
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{
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case OpCode::Id::MUL: {
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Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
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Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
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Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
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@ -228,8 +234,7 @@ void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned
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case OpCode::Id::DP3:
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case OpCode::Id::DP4:
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case OpCode::Id::DPH:
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case OpCode::Id::DPHI:
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{
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case OpCode::Id::DPHI: {
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Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
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Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
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Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
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@ -239,7 +244,8 @@ void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned
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src1[3] = float24::FromFloat32(1.0f);
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int num_components = (opcode == OpCode::Id::DP3) ? 3 : 4;
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float24 dot = std::inner_product(src1, src1 + num_components, src2, float24::FromFloat32(0.f));
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float24 dot = std::inner_product(src1, src1 + num_components, src2,
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float24::FromFloat32(0.f));
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for (int i = 0; i < 4; ++i) {
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if (!swizzle.DestComponentEnabled(i))
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@ -252,8 +258,7 @@ void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned
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}
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// Reciprocal
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case OpCode::Id::RCP:
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{
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case OpCode::Id::RCP: {
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Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
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Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
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float24 rcp_res = float24::FromFloat32(1.0f / src1[0].ToFloat32());
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@ -268,8 +273,7 @@ void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned
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}
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// Reciprocal Square Root
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case OpCode::Id::RSQ:
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{
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case OpCode::Id::RSQ: {
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Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
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Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
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float24 rsq_res = float24::FromFloat32(1.0f / std::sqrt(src1[0].ToFloat32()));
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@ -283,8 +287,7 @@ void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned
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break;
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}
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case OpCode::Id::MOVA:
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{
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case OpCode::Id::MOVA: {
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Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
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for (int i = 0; i < 2; ++i) {
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if (!swizzle.DestComponentEnabled(i))
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@ -293,12 +296,12 @@ void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned
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// TODO: Figure out how the rounding is done on hardware
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state.address_registers[i] = static_cast<s32>(src1[i].ToFloat32());
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}
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Record<DebugDataRecord::ADDR_REG_OUT>(state.debug, iteration, state.address_registers);
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Record<DebugDataRecord::ADDR_REG_OUT>(state.debug, iteration,
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state.address_registers);
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break;
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}
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case OpCode::Id::MOV:
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{
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case OpCode::Id::MOV: {
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Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
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Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
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for (int i = 0; i < 4; ++i) {
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@ -320,7 +323,8 @@ void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned
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if (!swizzle.DestComponentEnabled(i))
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continue;
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dest[i] = (src1[i] >= src2[i]) ? float24::FromFloat32(1.0f) : float24::FromFloat32(0.0f);
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dest[i] = (src1[i] >= src2[i]) ? float24::FromFloat32(1.0f)
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: float24::FromFloat32(0.0f);
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}
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Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
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break;
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@ -334,7 +338,8 @@ void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned
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if (!swizzle.DestComponentEnabled(i))
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continue;
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dest[i] = (src1[i] < src2[i]) ? float24::FromFloat32(1.0f) : float24::FromFloat32(0.0f);
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dest[i] = (src1[i] < src2[i]) ? float24::FromFloat32(1.0f)
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: float24::FromFloat32(0.0f);
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}
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Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
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break;
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@ -349,40 +354,39 @@ void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned
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auto op = (i == 0) ? compare_op.x.Value() : compare_op.y.Value();
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switch (op) {
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case Instruction::Common::CompareOpType::Equal:
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state.conditional_code[i] = (src1[i] == src2[i]);
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break;
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case Instruction::Common::CompareOpType::Equal:
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state.conditional_code[i] = (src1[i] == src2[i]);
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break;
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case Instruction::Common::CompareOpType::NotEqual:
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state.conditional_code[i] = (src1[i] != src2[i]);
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break;
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case Instruction::Common::CompareOpType::NotEqual:
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state.conditional_code[i] = (src1[i] != src2[i]);
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break;
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case Instruction::Common::CompareOpType::LessThan:
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state.conditional_code[i] = (src1[i] < src2[i]);
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break;
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case Instruction::Common::CompareOpType::LessThan:
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state.conditional_code[i] = (src1[i] < src2[i]);
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break;
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case Instruction::Common::CompareOpType::LessEqual:
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state.conditional_code[i] = (src1[i] <= src2[i]);
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break;
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case Instruction::Common::CompareOpType::LessEqual:
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state.conditional_code[i] = (src1[i] <= src2[i]);
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break;
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case Instruction::Common::CompareOpType::GreaterThan:
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state.conditional_code[i] = (src1[i] > src2[i]);
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break;
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case Instruction::Common::CompareOpType::GreaterThan:
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state.conditional_code[i] = (src1[i] > src2[i]);
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break;
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case Instruction::Common::CompareOpType::GreaterEqual:
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state.conditional_code[i] = (src1[i] >= src2[i]);
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break;
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case Instruction::Common::CompareOpType::GreaterEqual:
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state.conditional_code[i] = (src1[i] >= src2[i]);
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break;
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default:
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LOG_ERROR(HW_GPU, "Unknown compare mode %x", static_cast<int>(op));
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break;
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default:
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LOG_ERROR(HW_GPU, "Unknown compare mode %x", static_cast<int>(op));
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break;
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}
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}
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Record<DebugDataRecord::CMP_RESULT>(state.debug, iteration, state.conditional_code);
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break;
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case OpCode::Id::EX2:
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{
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case OpCode::Id::EX2: {
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Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
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Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
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@ -399,8 +403,7 @@ void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned
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break;
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}
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case OpCode::Id::LG2:
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{
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case OpCode::Id::LG2: {
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Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
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Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
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@ -419,7 +422,8 @@ void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned
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default:
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LOG_ERROR(HW_GPU, "Unhandled arithmetic instruction: 0x%02x (%s): 0x%08x",
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(int)instr.opcode.Value().EffectiveOpCode(), instr.opcode.Value().GetInfo().name, instr.hex);
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(int)instr.opcode.Value().EffectiveOpCode(),
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instr.opcode.Value().GetInfo().name, instr.hex);
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DEBUG_ASSERT(false);
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break;
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}
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@ -427,30 +431,32 @@ void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned
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break;
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}
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case OpCode::Type::MultiplyAdd:
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{
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case OpCode::Type::MultiplyAdd: {
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if ((instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MAD) ||
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(instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MADI)) {
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const SwizzlePattern& swizzle = *reinterpret_cast<const SwizzlePattern*>(&swizzle_data[instr.mad.operand_desc_id]);
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const SwizzlePattern& swizzle = *reinterpret_cast<const SwizzlePattern*>(
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&swizzle_data[instr.mad.operand_desc_id]);
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bool is_inverted = (instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MADI);
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const int address_offset = (instr.mad.address_register_index == 0)
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? 0 : state.address_registers[instr.mad.address_register_index - 1];
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const int address_offset =
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(instr.mad.address_register_index == 0)
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? 0
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: state.address_registers[instr.mad.address_register_index - 1];
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const float24* src1_ = LookupSourceRegister(instr.mad.GetSrc1(is_inverted));
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const float24* src2_ = LookupSourceRegister(instr.mad.GetSrc2(is_inverted) + (!is_inverted * address_offset));
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const float24* src3_ = LookupSourceRegister(instr.mad.GetSrc3(is_inverted) + ( is_inverted * address_offset));
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const float24* src2_ = LookupSourceRegister(instr.mad.GetSrc2(is_inverted) +
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(!is_inverted * address_offset));
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const float24* src3_ = LookupSourceRegister(instr.mad.GetSrc3(is_inverted) +
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(is_inverted * address_offset));
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const bool negate_src1 = ((bool)swizzle.negate_src1 != false);
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const bool negate_src2 = ((bool)swizzle.negate_src2 != false);
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const bool negate_src3 = ((bool)swizzle.negate_src3 != false);
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float24 src1[4] = {
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src1_[(int)swizzle.GetSelectorSrc1(0)],
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src1_[(int)swizzle.GetSelectorSrc1(1)],
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src1_[(int)swizzle.GetSelectorSrc1(2)],
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src1_[(int)swizzle.GetSelectorSrc1(3)],
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src1_[(int)swizzle.GetSelectorSrc1(0)], src1_[(int)swizzle.GetSelectorSrc1(1)],
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src1_[(int)swizzle.GetSelectorSrc1(2)], src1_[(int)swizzle.GetSelectorSrc1(3)],
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};
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if (negate_src1) {
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src1[0] = src1[0] * float24::FromFloat32(-1);
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@ -459,10 +465,8 @@ void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned
|
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src1[3] = src1[3] * float24::FromFloat32(-1);
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}
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float24 src2[4] = {
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src2_[(int)swizzle.GetSelectorSrc2(0)],
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src2_[(int)swizzle.GetSelectorSrc2(1)],
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src2_[(int)swizzle.GetSelectorSrc2(2)],
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src2_[(int)swizzle.GetSelectorSrc2(3)],
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src2_[(int)swizzle.GetSelectorSrc2(0)], src2_[(int)swizzle.GetSelectorSrc2(1)],
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src2_[(int)swizzle.GetSelectorSrc2(2)], src2_[(int)swizzle.GetSelectorSrc2(3)],
|
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};
|
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if (negate_src2) {
|
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src2[0] = src2[0] * float24::FromFloat32(-1);
|
||||
@ -471,10 +475,8 @@ void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned
|
||||
src2[3] = src2[3] * float24::FromFloat32(-1);
|
||||
}
|
||||
float24 src3[4] = {
|
||||
src3_[(int)swizzle.GetSelectorSrc3(0)],
|
||||
src3_[(int)swizzle.GetSelectorSrc3(1)],
|
||||
src3_[(int)swizzle.GetSelectorSrc3(2)],
|
||||
src3_[(int)swizzle.GetSelectorSrc3(3)],
|
||||
src3_[(int)swizzle.GetSelectorSrc3(0)], src3_[(int)swizzle.GetSelectorSrc3(1)],
|
||||
src3_[(int)swizzle.GetSelectorSrc3(2)], src3_[(int)swizzle.GetSelectorSrc3(3)],
|
||||
};
|
||||
if (negate_src3) {
|
||||
src3[0] = src3[0] * float24::FromFloat32(-1);
|
||||
@ -483,9 +485,12 @@ void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned
|
||||
src3[3] = src3[3] * float24::FromFloat32(-1);
|
||||
}
|
||||
|
||||
float24* dest = (instr.mad.dest.Value() < 0x10) ? &state.output_registers.value[instr.mad.dest.Value().GetIndex()][0]
|
||||
: (instr.mad.dest.Value() < 0x20) ? &state.registers.temporary[instr.mad.dest.Value().GetIndex()][0]
|
||||
: dummy_vec4_float24;
|
||||
float24* dest =
|
||||
(instr.mad.dest.Value() < 0x10)
|
||||
? &state.output_registers.value[instr.mad.dest.Value().GetIndex()][0]
|
||||
: (instr.mad.dest.Value() < 0x20)
|
||||
? &state.registers.temporary[instr.mad.dest.Value().GetIndex()][0]
|
||||
: dummy_vec4_float24;
|
||||
|
||||
Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
|
||||
Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
|
||||
@ -500,16 +505,17 @@ void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned
|
||||
Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
|
||||
} else {
|
||||
LOG_ERROR(HW_GPU, "Unhandled multiply-add instruction: 0x%02x (%s): 0x%08x",
|
||||
(int)instr.opcode.Value().EffectiveOpCode(), instr.opcode.Value().GetInfo().name, instr.hex);
|
||||
(int)instr.opcode.Value().EffectiveOpCode(),
|
||||
instr.opcode.Value().GetInfo().name, instr.hex);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
{
|
||||
static auto evaluate_condition = [](const UnitState<Debug>& state, bool refx, bool refy, Instruction::FlowControlType flow_control) {
|
||||
bool results[2] = { refx == state.conditional_code[0],
|
||||
refy == state.conditional_code[1] };
|
||||
default: {
|
||||
static auto evaluate_condition = [](const UnitState<Debug>& state, bool refx, bool refy,
|
||||
Instruction::FlowControlType flow_control) {
|
||||
bool results[2] = {refx == state.conditional_code[0],
|
||||
refy == state.conditional_code[1]};
|
||||
|
||||
switch (flow_control.op) {
|
||||
case flow_control.Or:
|
||||
@ -533,44 +539,45 @@ void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned
|
||||
break;
|
||||
|
||||
case OpCode::Id::JMPC:
|
||||
Record<DebugDataRecord::COND_CMP_IN>(state.debug, iteration, state.conditional_code);
|
||||
if (evaluate_condition(state, instr.flow_control.refx, instr.flow_control.refy, instr.flow_control)) {
|
||||
Record<DebugDataRecord::COND_CMP_IN>(state.debug, iteration,
|
||||
state.conditional_code);
|
||||
if (evaluate_condition(state, instr.flow_control.refx, instr.flow_control.refy,
|
||||
instr.flow_control)) {
|
||||
program_counter = instr.flow_control.dest_offset - 1;
|
||||
}
|
||||
break;
|
||||
|
||||
case OpCode::Id::JMPU:
|
||||
Record<DebugDataRecord::COND_BOOL_IN>(state.debug, iteration, uniforms.b[instr.flow_control.bool_uniform_id]);
|
||||
Record<DebugDataRecord::COND_BOOL_IN>(
|
||||
state.debug, iteration, uniforms.b[instr.flow_control.bool_uniform_id]);
|
||||
|
||||
if (uniforms.b[instr.flow_control.bool_uniform_id] == !(instr.flow_control.num_instructions & 1)) {
|
||||
if (uniforms.b[instr.flow_control.bool_uniform_id] ==
|
||||
!(instr.flow_control.num_instructions & 1)) {
|
||||
program_counter = instr.flow_control.dest_offset - 1;
|
||||
}
|
||||
break;
|
||||
|
||||
case OpCode::Id::CALL:
|
||||
call(state,
|
||||
instr.flow_control.dest_offset,
|
||||
instr.flow_control.num_instructions,
|
||||
call(state, instr.flow_control.dest_offset, instr.flow_control.num_instructions,
|
||||
program_counter + 1, 0, 0);
|
||||
break;
|
||||
|
||||
case OpCode::Id::CALLU:
|
||||
Record<DebugDataRecord::COND_BOOL_IN>(state.debug, iteration, uniforms.b[instr.flow_control.bool_uniform_id]);
|
||||
Record<DebugDataRecord::COND_BOOL_IN>(
|
||||
state.debug, iteration, uniforms.b[instr.flow_control.bool_uniform_id]);
|
||||
if (uniforms.b[instr.flow_control.bool_uniform_id]) {
|
||||
call(state,
|
||||
instr.flow_control.dest_offset,
|
||||
instr.flow_control.num_instructions,
|
||||
program_counter + 1, 0, 0);
|
||||
call(state, instr.flow_control.dest_offset, instr.flow_control.num_instructions,
|
||||
program_counter + 1, 0, 0);
|
||||
}
|
||||
break;
|
||||
|
||||
case OpCode::Id::CALLC:
|
||||
Record<DebugDataRecord::COND_CMP_IN>(state.debug, iteration, state.conditional_code);
|
||||
if (evaluate_condition(state, instr.flow_control.refx, instr.flow_control.refy, instr.flow_control)) {
|
||||
call(state,
|
||||
instr.flow_control.dest_offset,
|
||||
instr.flow_control.num_instructions,
|
||||
program_counter + 1, 0, 0);
|
||||
Record<DebugDataRecord::COND_CMP_IN>(state.debug, iteration,
|
||||
state.conditional_code);
|
||||
if (evaluate_condition(state, instr.flow_control.refx, instr.flow_control.refy,
|
||||
instr.flow_control)) {
|
||||
call(state, instr.flow_control.dest_offset, instr.flow_control.num_instructions,
|
||||
program_counter + 1, 0, 0);
|
||||
}
|
||||
break;
|
||||
|
||||
@ -578,43 +585,42 @@ void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned
|
||||
break;
|
||||
|
||||
case OpCode::Id::IFU:
|
||||
Record<DebugDataRecord::COND_BOOL_IN>(state.debug, iteration, uniforms.b[instr.flow_control.bool_uniform_id]);
|
||||
Record<DebugDataRecord::COND_BOOL_IN>(
|
||||
state.debug, iteration, uniforms.b[instr.flow_control.bool_uniform_id]);
|
||||
if (uniforms.b[instr.flow_control.bool_uniform_id]) {
|
||||
call(state,
|
||||
program_counter + 1,
|
||||
call(state, program_counter + 1,
|
||||
instr.flow_control.dest_offset - program_counter - 1,
|
||||
instr.flow_control.dest_offset + instr.flow_control.num_instructions, 0, 0);
|
||||
instr.flow_control.dest_offset + instr.flow_control.num_instructions, 0,
|
||||
0);
|
||||
} else {
|
||||
call(state,
|
||||
instr.flow_control.dest_offset,
|
||||
instr.flow_control.num_instructions,
|
||||
instr.flow_control.dest_offset + instr.flow_control.num_instructions, 0, 0);
|
||||
call(state, instr.flow_control.dest_offset, instr.flow_control.num_instructions,
|
||||
instr.flow_control.dest_offset + instr.flow_control.num_instructions, 0,
|
||||
0);
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
case OpCode::Id::IFC:
|
||||
{
|
||||
case OpCode::Id::IFC: {
|
||||
// TODO: Do we need to consider swizzlers here?
|
||||
|
||||
Record<DebugDataRecord::COND_CMP_IN>(state.debug, iteration, state.conditional_code);
|
||||
if (evaluate_condition(state, instr.flow_control.refx, instr.flow_control.refy, instr.flow_control)) {
|
||||
call(state,
|
||||
program_counter + 1,
|
||||
Record<DebugDataRecord::COND_CMP_IN>(state.debug, iteration,
|
||||
state.conditional_code);
|
||||
if (evaluate_condition(state, instr.flow_control.refx, instr.flow_control.refy,
|
||||
instr.flow_control)) {
|
||||
call(state, program_counter + 1,
|
||||
instr.flow_control.dest_offset - program_counter - 1,
|
||||
instr.flow_control.dest_offset + instr.flow_control.num_instructions, 0, 0);
|
||||
instr.flow_control.dest_offset + instr.flow_control.num_instructions, 0,
|
||||
0);
|
||||
} else {
|
||||
call(state,
|
||||
instr.flow_control.dest_offset,
|
||||
instr.flow_control.num_instructions,
|
||||
instr.flow_control.dest_offset + instr.flow_control.num_instructions, 0, 0);
|
||||
call(state, instr.flow_control.dest_offset, instr.flow_control.num_instructions,
|
||||
instr.flow_control.dest_offset + instr.flow_control.num_instructions, 0,
|
||||
0);
|
||||
}
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
case OpCode::Id::LOOP:
|
||||
{
|
||||
case OpCode::Id::LOOP: {
|
||||
Math::Vec4<u8> loop_param(uniforms.i[instr.flow_control.int_uniform_id].x,
|
||||
uniforms.i[instr.flow_control.int_uniform_id].y,
|
||||
uniforms.i[instr.flow_control.int_uniform_id].z,
|
||||
@ -622,18 +628,16 @@ void RunInterpreter(const ShaderSetup& setup, UnitState<Debug>& state, unsigned
|
||||
state.address_registers[2] = loop_param.y;
|
||||
|
||||
Record<DebugDataRecord::LOOP_INT_IN>(state.debug, iteration, loop_param);
|
||||
call(state,
|
||||
program_counter + 1,
|
||||
call(state, program_counter + 1,
|
||||
instr.flow_control.dest_offset - program_counter + 1,
|
||||
instr.flow_control.dest_offset + 1,
|
||||
loop_param.x,
|
||||
loop_param.z);
|
||||
instr.flow_control.dest_offset + 1, loop_param.x, loop_param.z);
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
LOG_ERROR(HW_GPU, "Unhandled instruction: 0x%02x (%s): 0x%08x",
|
||||
(int)instr.opcode.Value().EffectiveOpCode(), instr.opcode.Value().GetInfo().name, instr.hex);
|
||||
(int)instr.opcode.Value().EffectiveOpCode(),
|
||||
instr.opcode.Value().GetInfo().name, instr.hex);
|
||||
break;
|
||||
}
|
||||
|
||||
|
Reference in New Issue
Block a user