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https://github.com/yuzu-emu/yuzu-android.git
synced 2025-06-10 19:08:24 -05:00
shader: Implement geometry shaders
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@ -308,19 +308,27 @@ U1 IREmitter::GetFlowTestResult(FlowTest test) {
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}
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F32 IREmitter::GetAttribute(IR::Attribute attribute) {
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return Inst<F32>(Opcode::GetAttribute, attribute);
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return GetAttribute(attribute, Imm32(0));
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}
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void IREmitter::SetAttribute(IR::Attribute attribute, const F32& value) {
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Inst(Opcode::SetAttribute, attribute, value);
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F32 IREmitter::GetAttribute(IR::Attribute attribute, const U32& vertex) {
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return Inst<F32>(Opcode::GetAttribute, attribute, vertex);
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}
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void IREmitter::SetAttribute(IR::Attribute attribute, const F32& value, const U32& vertex) {
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Inst(Opcode::SetAttribute, attribute, value, vertex);
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}
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F32 IREmitter::GetAttributeIndexed(const U32& phys_address) {
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return Inst<F32>(Opcode::GetAttributeIndexed, phys_address);
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return GetAttributeIndexed(phys_address, Imm32(0));
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}
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void IREmitter::SetAttributeIndexed(const U32& phys_address, const F32& value) {
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Inst(Opcode::SetAttributeIndexed, phys_address, value);
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F32 IREmitter::GetAttributeIndexed(const U32& phys_address, const U32& vertex) {
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return Inst<F32>(Opcode::GetAttributeIndexed, phys_address, vertex);
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}
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void IREmitter::SetAttributeIndexed(const U32& phys_address, const F32& value, const U32& vertex) {
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Inst(Opcode::SetAttributeIndexed, phys_address, value, vertex);
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}
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void IREmitter::SetFragColor(u32 index, u32 component, const F32& value) {
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@ -77,10 +77,12 @@ public:
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[[nodiscard]] U1 GetFlowTestResult(FlowTest test);
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[[nodiscard]] F32 GetAttribute(IR::Attribute attribute);
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void SetAttribute(IR::Attribute attribute, const F32& value);
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[[nodiscard]] F32 GetAttribute(IR::Attribute attribute, const U32& vertex);
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void SetAttribute(IR::Attribute attribute, const F32& value, const U32& vertex);
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[[nodiscard]] F32 GetAttributeIndexed(const U32& phys_address);
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void SetAttributeIndexed(const U32& phys_address, const F32& value);
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[[nodiscard]] F32 GetAttributeIndexed(const U32& phys_address, const U32& vertex);
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void SetAttributeIndexed(const U32& phys_address, const F32& value, const U32& vertex);
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void SetFragColor(u32 index, u32 component, const F32& value);
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void SetFragDepth(const F32& value);
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@ -44,10 +44,10 @@ OPCODE(GetCbufS16, U32, U32,
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OPCODE(GetCbufU32, U32, U32, U32, )
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OPCODE(GetCbufF32, F32, U32, U32, )
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OPCODE(GetCbufU32x2, U32x2, U32, U32, )
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OPCODE(GetAttribute, F32, Attribute, )
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OPCODE(SetAttribute, Void, Attribute, F32, )
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OPCODE(GetAttributeIndexed, F32, U32, )
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OPCODE(SetAttributeIndexed, Void, U32, F32, )
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OPCODE(GetAttribute, F32, Attribute, U32, )
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OPCODE(SetAttribute, Void, Attribute, F32, U32, )
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OPCODE(GetAttributeIndexed, F32, U32, U32, )
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OPCODE(SetAttributeIndexed, Void, U32, F32, U32, )
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OPCODE(SetFragColor, Void, U32, U32, F32, )
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OPCODE(SetFragDepth, Void, F32, )
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OPCODE(GetZFlag, U1, Void, )
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@ -10,6 +10,7 @@
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#include <boost/container/small_vector.hpp>
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#include "shader_recompiler/frontend/ir/basic_block.h"
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#include "shader_recompiler/program_header.h"
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#include "shader_recompiler/shader_info.h"
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#include "shader_recompiler/stage.h"
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@ -21,6 +22,9 @@ struct Program {
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Info info;
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Stage stage{};
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std::array<u32, 3> workgroup_size{};
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OutputTopology output_topology{};
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u32 output_vertices{};
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u32 invocations{};
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u32 local_memory_size{};
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u32 shared_memory_size{};
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};
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@ -69,9 +69,20 @@ IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Blo
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program.post_order_blocks = PostOrder(program.blocks);
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program.stage = env.ShaderStage();
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program.local_memory_size = env.LocalMemorySize();
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if (program.stage == Stage::Compute) {
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switch (program.stage) {
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case Stage::Geometry: {
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const ProgramHeader& sph{env.SPH()};
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program.output_topology = sph.common3.output_topology;
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program.output_vertices = sph.common4.max_output_vertices;
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program.invocations = sph.common2.threads_per_input_primitive;
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break;
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}
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case Stage::Compute:
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program.workgroup_size = env.WorkgroupSize();
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program.shared_memory_size = env.SharedMemorySize();
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break;
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default:
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break;
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}
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RemoveUnreachableBlocks(program);
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@ -64,7 +64,7 @@ void TranslatorVisitor::ALD(u64 insn) {
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BitField<8, 8, IR::Reg> index_reg;
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BitField<20, 10, u64> absolute_offset;
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BitField<20, 11, s64> relative_offset;
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BitField<39, 8, IR::Reg> array_reg;
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BitField<39, 8, IR::Reg> vertex_reg;
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BitField<32, 1, u64> o;
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BitField<31, 1, u64> patch;
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BitField<47, 2, Size> size;
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@ -80,15 +80,17 @@ void TranslatorVisitor::ALD(u64 insn) {
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if (offset % 4 != 0) {
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throw NotImplementedException("Unaligned absolute offset {}", offset);
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}
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const IR::U32 vertex{X(ald.vertex_reg)};
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const u32 num_elements{NumElements(ald.size)};
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if (ald.index_reg == IR::Reg::RZ) {
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for (u32 element = 0; element < num_elements; ++element) {
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F(ald.dest_reg + element, ir.GetAttribute(IR::Attribute{offset / 4 + element}));
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const IR::Attribute attr{offset / 4 + element};
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F(ald.dest_reg + element, ir.GetAttribute(attr, vertex));
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}
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return;
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}
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HandleIndexed(*this, ald.index_reg, num_elements, [&](u32 element, IR::U32 final_offset) {
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F(ald.dest_reg + element, ir.GetAttributeIndexed(final_offset));
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F(ald.dest_reg + element, ir.GetAttributeIndexed(final_offset, vertex));
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});
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}
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@ -100,7 +102,7 @@ void TranslatorVisitor::AST(u64 insn) {
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BitField<20, 10, u64> absolute_offset;
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BitField<20, 11, s64> relative_offset;
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BitField<31, 1, u64> patch;
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BitField<39, 8, IR::Reg> array_reg;
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BitField<39, 8, IR::Reg> vertex_reg;
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BitField<47, 2, Size> size;
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} const ast{insn};
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@ -114,15 +116,17 @@ void TranslatorVisitor::AST(u64 insn) {
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if (offset % 4 != 0) {
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throw NotImplementedException("Unaligned absolute offset {}", offset);
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}
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const IR::U32 vertex{X(ast.vertex_reg)};
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const u32 num_elements{NumElements(ast.size)};
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if (ast.index_reg == IR::Reg::RZ) {
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for (u32 element = 0; element < num_elements; ++element) {
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ir.SetAttribute(IR::Attribute{offset / 4 + element}, F(ast.src_reg + element));
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const IR::Attribute attr{offset / 4 + element};
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ir.SetAttribute(attr, F(ast.src_reg + element), vertex);
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}
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return;
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}
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HandleIndexed(*this, ast.index_reg, num_elements, [&](u32 element, IR::U32 final_offset) {
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ir.SetAttributeIndexed(final_offset, F(ast.src_reg + element));
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ir.SetAttributeIndexed(final_offset, F(ast.src_reg + element), vertex);
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});
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}
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