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Merge yuzu-emu#12461

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yuzubot
2024-02-25 00:57:11 +00:00
parent a93d249ac1
commit f872f4c2b0
43 changed files with 12380 additions and 1238 deletions
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84
src/video_core/host1x/nvdec_common.h
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@ -17,6 +17,17 @@ enum class VideoCodec : u64 {
VP9 = 0x9,
};
struct Offset {
constexpr u64 Address() const noexcept {
return offset << 8;
}
private:
u64 offset;
};
static_assert(std::is_trivial_v<Offset>, "Offset must be trivial");
static_assert(sizeof(Offset) == 0x8, "Offset has the wrong size!");
// NVDEC should use a 32-bit address space, but is mapped to 64-bit,
// doubling the sizes here is compensating for that.
struct NvdecRegisters {
@ -38,29 +49,40 @@ struct NvdecRegisters {
BitField<17, 1, u64> all_intra_frame;
};
} control_params;
u64 picture_info_offset; ///< 0x0808
u64 frame_bitstream_offset; ///< 0x0810
u64 frame_number; ///< 0x0818
u64 h264_slice_data_offsets; ///< 0x0820
u64 h264_mv_dump_offset; ///< 0x0828
INSERT_PADDING_WORDS_NOINIT(6); ///< 0x0830
u64 frame_stats_offset; ///< 0x0848
u64 h264_last_surface_luma_offset; ///< 0x0850
u64 h264_last_surface_chroma_offset; ///< 0x0858
std::array<u64, 17> surface_luma_offset; ///< 0x0860
std::array<u64, 17> surface_chroma_offset; ///< 0x08E8
INSERT_PADDING_WORDS_NOINIT(68); ///< 0x0970
u64 vp8_prob_data_offset; ///< 0x0A80
u64 vp8_header_partition_buf_offset; ///< 0x0A88
INSERT_PADDING_WORDS_NOINIT(60); ///< 0x0A90
u64 vp9_entropy_probs_offset; ///< 0x0B80
u64 vp9_backward_updates_offset; ///< 0x0B88
u64 vp9_last_frame_segmap_offset; ///< 0x0B90
u64 vp9_curr_frame_segmap_offset; ///< 0x0B98
INSERT_PADDING_WORDS_NOINIT(2); ///< 0x0BA0
u64 vp9_last_frame_mvs_offset; ///< 0x0BA8
u64 vp9_curr_frame_mvs_offset; ///< 0x0BB0
INSERT_PADDING_WORDS_NOINIT(2); ///< 0x0BB8
Offset picture_info_offset; ///< 0x0808
Offset frame_bitstream_offset; ///< 0x0810
u64 frame_number; ///< 0x0818
Offset h264_slice_data_offsets; ///< 0x0820
Offset h264_mv_dump_offset; ///< 0x0828
INSERT_PADDING_WORDS_NOINIT(6); ///< 0x0830
Offset frame_stats_offset; ///< 0x0848
Offset h264_last_surface_luma_offset; ///< 0x0850
Offset h264_last_surface_chroma_offset; ///< 0x0858
std::array<Offset, 17> surface_luma_offsets; ///< 0x0860
std::array<Offset, 17> surface_chroma_offsets; ///< 0x08E8
Offset pic_scratch_buf_offset; ///< 0x0970
Offset external_mvbuffer_offset; ///< 0x0978
INSERT_PADDING_WORDS_NOINIT(32); ///< 0x0980
Offset h264_mbhist_buffer_offset; ///< 0x0A00
INSERT_PADDING_WORDS_NOINIT(30); ///< 0x0A08
Offset vp8_prob_data_offset; ///< 0x0A80
Offset vp8_header_partition_buf_offset; ///< 0x0A88
INSERT_PADDING_WORDS_NOINIT(28); ///< 0x0A90
Offset hvec_scalist_list_offset; ///< 0x0B00
Offset hvec_tile_sizes_offset; ///< 0x0B08
Offset hvec_filter_buffer_offset; ///< 0x0B10
Offset hvec_sao_buffer_offset; ///< 0x0B18
Offset hvec_slice_info_buffer_offset; ///< 0x0B20
Offset hvec_slice_group_index_offset; ///< 0x0B28
INSERT_PADDING_WORDS_NOINIT(20); ///< 0x0B30
Offset vp9_prob_tab_buffer_offset; ///< 0x0B80
Offset vp9_ctx_counter_buffer_offset; ///< 0x0B88
Offset vp9_segment_read_buffer_offset; ///< 0x0B90
Offset vp9_segment_write_buffer_offset; ///< 0x0B98
Offset vp9_tile_size_buffer_offset; ///< 0x0BA0
Offset vp9_col_mvwrite_buffer_offset; ///< 0x0BA8
Offset vp9_col_mvread_buffer_offset; ///< 0x0BB0
Offset vp9_filter_buffer_offset; ///< 0x0BB8
};
std::array<u64, NUM_REGS> reg_array;
};
@ -81,16 +103,16 @@ ASSERT_REG_POSITION(h264_slice_data_offsets, 0x104);
ASSERT_REG_POSITION(frame_stats_offset, 0x109);
ASSERT_REG_POSITION(h264_last_surface_luma_offset, 0x10A);
ASSERT_REG_POSITION(h264_last_surface_chroma_offset, 0x10B);
ASSERT_REG_POSITION(surface_luma_offset, 0x10C);
ASSERT_REG_POSITION(surface_chroma_offset, 0x11D);
ASSERT_REG_POSITION(surface_luma_offsets, 0x10C);
ASSERT_REG_POSITION(surface_chroma_offsets, 0x11D);
ASSERT_REG_POSITION(vp8_prob_data_offset, 0x150);
ASSERT_REG_POSITION(vp8_header_partition_buf_offset, 0x151);
ASSERT_REG_POSITION(vp9_entropy_probs_offset, 0x170);
ASSERT_REG_POSITION(vp9_backward_updates_offset, 0x171);
ASSERT_REG_POSITION(vp9_last_frame_segmap_offset, 0x172);
ASSERT_REG_POSITION(vp9_curr_frame_segmap_offset, 0x173);
ASSERT_REG_POSITION(vp9_last_frame_mvs_offset, 0x175);
ASSERT_REG_POSITION(vp9_curr_frame_mvs_offset, 0x176);
ASSERT_REG_POSITION(vp9_prob_tab_buffer_offset, 0x170);
ASSERT_REG_POSITION(vp9_ctx_counter_buffer_offset, 0x171);
ASSERT_REG_POSITION(vp9_segment_read_buffer_offset, 0x172);
ASSERT_REG_POSITION(vp9_segment_write_buffer_offset, 0x173);
ASSERT_REG_POSITION(vp9_col_mvwrite_buffer_offset, 0x175);
ASSERT_REG_POSITION(vp9_col_mvread_buffer_offset, 0x176);
#undef ASSERT_REG_POSITION