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shader: Support SSA loops on IR

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This commit is contained in:
ReinUsesLisp
2021-02-14 20:15:42 -03:00
committed by ameerj
parent 8af9297f09
commit cbfb7d182a
12 changed files with 150 additions and 46 deletions
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8
src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
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@ -73,8 +73,8 @@ Id EmitSPIRV::EmitBitFieldUExtract(EmitContext& ctx, Id base, Id offset, Id coun
return ctx.OpBitFieldUExtract(ctx.u32[1], base, offset, count);
}
void EmitSPIRV::EmitSLessThan(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
Id EmitSPIRV::EmitSLessThan(EmitContext& ctx, Id lhs, Id rhs) {
return ctx.OpSLessThan(ctx.u1, lhs, rhs);
}
void EmitSPIRV::EmitULessThan(EmitContext&) {
@ -93,8 +93,8 @@ void EmitSPIRV::EmitULessThanEqual(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
}
void EmitSPIRV::EmitSGreaterThan(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
Id EmitSPIRV::EmitSGreaterThan(EmitContext& ctx, Id lhs, Id rhs) {
return ctx.OpSGreaterThan(ctx.u1, lhs, rhs);
}
void EmitSPIRV::EmitUGreaterThan(EmitContext&) {