6 Commits

Author	SHA1	Message	Date
ReinUsesLisp	ca05a13c62	glasm: Catch more register leaks ... Add support for null registers. These are used when an instruction has no usages. This comes handy when an instruction is only used for its CC value, with the caveat of having to invalidate all pseudo-instructions before defining the instruction itself in the register allocator. This commits changes this. Workaround a bug on Nvidia's condition codes conditional execution using branches.	2021-07-22 21:51:33 -04:00
ReinUsesLisp	f1b334b9f9	glasm: Remove unintentional comma on vector insert	2021-07-22 21:51:31 -04:00
ReinUsesLisp	70fbede213	glasm: Review all GLASM insts to be aware of register aliasing	2021-07-22 21:51:31 -04:00
ReinUsesLisp	939dab7120	glasm: Implement more GLASM composite instructions	2021-07-22 21:51:30 -04:00
ReinUsesLisp	1c9307969c	glasm: Make GLASM aware of types	2021-07-22 21:51:30 -04:00
ReinUsesLisp	b10cf64c48	glasm: Add GLASM backend infrastructure	2021-07-22 21:51:30 -04:00